Search

Eliseo Ramos Feliciano

Supervisory Patent Examiner (ID: 8243, Phone: (571)272-7925 , Office: P/2863 )

Most Active Art Unit
2617
Art Unit(s)
2857, 2617, 2681, 2895, 2745, 2817, 2687, 2682
Total Applications
285
Issued Applications
150
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3853602 [patent_doc_number] => 05761736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Apparatus and method for implementing multiple scaled states in a state machine' [patent_app_type] => 1 [patent_app_number] => 8/648711 [patent_app_country] => US [patent_app_date] => 1996-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 7071 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761736.pdf [firstpage_image] =>[orig_patent_app_number] => 648711 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/648711
Apparatus and method for implementing multiple scaled states in a state machine May 15, 1996 Issued
Array ( [id] => 3772958 [patent_doc_number] => 05852741 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'VLIW processor which processes compressed instruction format' [patent_app_type] => 1 [patent_app_number] => 8/648359 [patent_app_country] => US [patent_app_date] => 1996-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 7522 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852741.pdf [firstpage_image] =>[orig_patent_app_number] => 648359 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/648359
VLIW processor which processes compressed instruction format May 14, 1996 Issued
Array ( [id] => 3756234 [patent_doc_number] => 05787302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Software for producing instructions in a compressed format for a VLIW processor' [patent_app_type] => 1 [patent_app_number] => 8/649731 [patent_app_country] => US [patent_app_date] => 1996-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 7421 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787302.pdf [firstpage_image] =>[orig_patent_app_number] => 649731 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649731
Software for producing instructions in a compressed format for a VLIW processor May 14, 1996 Issued
Array ( [id] => 3904321 [patent_doc_number] => 05778172 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Enhanced real-time topology analysis system or high speed networks' [patent_app_type] => 1 [patent_app_number] => 8/635811 [patent_app_country] => US [patent_app_date] => 1996-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5278 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778172.pdf [firstpage_image] =>[orig_patent_app_number] => 635811 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/635811
Enhanced real-time topology analysis system or high speed networks Apr 21, 1996 Issued
Array ( [id] => 3544750 [patent_doc_number] => 05584038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Entry allocation in a circular buffer using wrap bits indicating whether a queue of the circular buffer has been traversed' [patent_app_type] => 1 [patent_app_number] => 8/633905 [patent_app_country] => US [patent_app_date] => 1996-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7419 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/584/05584038.pdf [firstpage_image] =>[orig_patent_app_number] => 633905 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/633905
Entry allocation in a circular buffer using wrap bits indicating whether a queue of the circular buffer has been traversed Apr 16, 1996 Issued
Array ( [id] => 3966001 [patent_doc_number] => 05956518 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Intermediate-grain reconfigurable processing device' [patent_app_type] => 1 [patent_app_number] => 8/632371 [patent_app_country] => US [patent_app_date] => 1996-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 38 [patent_no_of_words] => 15825 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956518.pdf [firstpage_image] =>[orig_patent_app_number] => 632371 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632371
Intermediate-grain reconfigurable processing device Apr 10, 1996 Issued
Array ( [id] => 3806395 [patent_doc_number] => 05841966 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Distributed messaging system' [patent_app_type] => 1 [patent_app_number] => 8/627590 [patent_app_country] => US [patent_app_date] => 1996-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3155 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841966.pdf [firstpage_image] =>[orig_patent_app_number] => 627590 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627590
Distributed messaging system Apr 3, 1996 Issued
Array ( [id] => 4423505 [patent_doc_number] => 06311265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Apparatuses and methods for programming parallel computers' [patent_app_type] => 1 [patent_app_number] => 8/627801 [patent_app_country] => US [patent_app_date] => 1996-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 103 [patent_no_of_words] => 33065 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/311/06311265.pdf [firstpage_image] =>[orig_patent_app_number] => 627801 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627801
Apparatuses and methods for programming parallel computers Mar 24, 1996 Issued
Array ( [id] => 3878541 [patent_doc_number] => 05794002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'System and technique for synchronizing data to instructions in a real time computing application' [patent_app_type] => 1 [patent_app_number] => 8/620624 [patent_app_country] => US [patent_app_date] => 1996-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1676 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794002.pdf [firstpage_image] =>[orig_patent_app_number] => 620624 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/620624
System and technique for synchronizing data to instructions in a real time computing application Mar 21, 1996 Issued
Array ( [id] => 3779221 [patent_doc_number] => 05845129 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Protection domains in a single address space' [patent_app_type] => 1 [patent_app_number] => 8/621759 [patent_app_country] => US [patent_app_date] => 1996-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5339 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/845/05845129.pdf [firstpage_image] =>[orig_patent_app_number] => 621759 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/621759
Protection domains in a single address space Mar 21, 1996 Issued
Array ( [id] => 3802222 [patent_doc_number] => 05822535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Network management and data collection system' [patent_app_type] => 1 [patent_app_number] => 8/615631 [patent_app_country] => US [patent_app_date] => 1996-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 11047 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822535.pdf [firstpage_image] =>[orig_patent_app_number] => 615631 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/615631
Network management and data collection system Mar 12, 1996 Issued
Array ( [id] => 3879478 [patent_doc_number] => 05794064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Data driven information processor' [patent_app_type] => 1 [patent_app_number] => 8/613671 [patent_app_country] => US [patent_app_date] => 1996-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 8332 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794064.pdf [firstpage_image] =>[orig_patent_app_number] => 613671 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/613671
Data driven information processor Mar 10, 1996 Issued
Array ( [id] => 3708589 [patent_doc_number] => 05619673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Virtual access cache protection bits handling method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/610802 [patent_app_country] => US [patent_app_date] => 1996-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2384 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619673.pdf [firstpage_image] =>[orig_patent_app_number] => 610802 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610802
Virtual access cache protection bits handling method and apparatus Mar 6, 1996 Issued
Array ( [id] => 3915484 [patent_doc_number] => 05944814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Parallel processing digital audio processing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/611081 [patent_app_country] => US [patent_app_date] => 1996-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5620 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/944/05944814.pdf [firstpage_image] =>[orig_patent_app_number] => 611081 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/611081
Parallel processing digital audio processing apparatus Mar 4, 1996 Issued
Array ( [id] => 3802649 [patent_doc_number] => 05822561 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Pipeline data processing apparatus and method for executing a plurality of data processes having a data-dependent relationship' [patent_app_type] => 1 [patent_app_number] => 8/609746 [patent_app_country] => US [patent_app_date] => 1996-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 7817 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822561.pdf [firstpage_image] =>[orig_patent_app_number] => 609746 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/609746
Pipeline data processing apparatus and method for executing a plurality of data processes having a data-dependent relationship Feb 29, 1996 Issued
08/608965 INFORMATION PROCESSING APPARATUS USING FINITE STATE MACHINE Feb 28, 1996 Abandoned
Array ( [id] => 3842483 [patent_doc_number] => 05784638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Computer system supporting control transfers between two architectures' [patent_app_type] => 1 [patent_app_number] => 8/605409 [patent_app_country] => US [patent_app_date] => 1996-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3217 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784638.pdf [firstpage_image] =>[orig_patent_app_number] => 605409 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/605409
Computer system supporting control transfers between two architectures Feb 21, 1996 Issued
Array ( [id] => 3859318 [patent_doc_number] => 05745781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Memoryless communications adapter including queueing and matching primitives for scalable distributed parallel computer systems' [patent_app_type] => 1 [patent_app_number] => 8/598931 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 9190 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745781.pdf [firstpage_image] =>[orig_patent_app_number] => 598931 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/598931
Memoryless communications adapter including queueing and matching primitives for scalable distributed parallel computer systems Feb 8, 1996 Issued
Array ( [id] => 3708737 [patent_doc_number] => 05678006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Network switch having network management agent functions distributed among multiple trunk and service modules' [patent_app_type] => 1 [patent_app_number] => 8/595494 [patent_app_country] => US [patent_app_date] => 1996-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2631 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/678/05678006.pdf [firstpage_image] =>[orig_patent_app_number] => 595494 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/595494
Network switch having network management agent functions distributed among multiple trunk and service modules Jan 31, 1996 Issued
Array ( [id] => 4031741 [patent_doc_number] => 05881295 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Data processor which controls interrupts during programming and erasing of on-chip erasable and programmable non-volatile program memory' [patent_app_type] => 1 [patent_app_number] => 8/594022 [patent_app_country] => US [patent_app_date] => 1996-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 16183 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881295.pdf [firstpage_image] =>[orig_patent_app_number] => 594022 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594022
Data processor which controls interrupts during programming and erasing of on-chip erasable and programmable non-volatile program memory Jan 28, 1996 Issued
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