Eliseo Ramos Feliciano

Array ( [id] => 3872873 [patent_doc_number] => 05768594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Methods and means for scheduling parallel processors' [patent_app_type] => 1 [patent_app_number] => 8/502625 [patent_app_country] => US [patent_app_date] => 1995-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 11208 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768594.pdf [firstpage_image] =>[orig_patent_app_number] => 502625 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3800599 [patent_doc_number] => 05726689 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Mapping apparatus and method' [patent_app_type] => 1 [patent_app_number] => 8/500167 [patent_app_country] => US [patent_app_date] => 1995-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7024 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/726/05726689.pdf [firstpage_image] =>[orig_patent_app_number] => 500167 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3569703 [patent_doc_number] => 05544342 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'System and method for prefetching information in a processing system' [patent_app_type] => 1 [patent_app_number] => 8/501244 [patent_app_country] => US [patent_app_date] => 1995-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 63 [patent_no_of_words] => 40099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544342.pdf [firstpage_image] =>[orig_patent_app_number] => 501244 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3772609 [patent_doc_number] => 05852718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Method and apparatus for hybrid packet-switched and circuit-switched flow control in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/498950 [patent_app_country] => US [patent_app_date] => 1995-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 12685 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852718.pdf [firstpage_image] =>[orig_patent_app_number] => 498950 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3859170 [patent_doc_number] => 05745771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Disc array device and disc control method' [patent_app_type] => 1 [patent_app_number] => 8/499004 [patent_app_country] => US [patent_app_date] => 1995-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 5999 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745771.pdf [firstpage_image] =>[orig_patent_app_number] => 499004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3761278 [patent_doc_number] => 05802297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Client-server computer system and method utilizing a local client disk drive as a data cache' [patent_app_type] => 1 [patent_app_number] => 8/497290 [patent_app_country] => US [patent_app_date] => 1995-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5149 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802297.pdf [firstpage_image] =>[orig_patent_app_number] => 497290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3894412 [patent_doc_number] => 05729759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Data processing apparatus for performing cumulative processing on time series data' [patent_app_type] => 1 [patent_app_number] => 8/494064 [patent_app_country] => US [patent_app_date] => 1995-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729759.pdf [firstpage_image] =>[orig_patent_app_number] => 494064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3829638 [patent_doc_number] => 05812786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Variable rate and variable mode transmission system' [patent_app_type] => 1 [patent_app_number] => 8/494082 [patent_app_country] => US [patent_app_date] => 1995-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9638 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812786.pdf [firstpage_image] =>[orig_patent_app_number] => 494082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3828686 [patent_doc_number] => 05771361 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'Data processor having shared terminal for monitoring internal and external memory events' [patent_app_type] => 1 [patent_app_number] => 8/490447 [patent_app_country] => US [patent_app_date] => 1995-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2997 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/771/05771361.pdf [firstpage_image] =>[orig_patent_app_number] => 490447 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3907396 [patent_doc_number] => 05751282 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'System and method for calling video on demand using an electronic programming guide' [patent_app_type] => 1 [patent_app_number] => 8/490064 [patent_app_country] => US [patent_app_date] => 1995-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751282.pdf [firstpage_image] =>[orig_patent_app_number] => 490064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3854648 [patent_doc_number] => 05708800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'High speed microprocessor for processing and transferring N-bits of M-bit data' [patent_app_type] => 1 [patent_app_number] => 8/487170 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6256 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708800.pdf [firstpage_image] =>[orig_patent_app_number] => 487170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3919702 [patent_doc_number] => 05752065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'One cycle processor for real time processing' [patent_app_type] => 1 [patent_app_number] => 8/477207 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 7556 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/752/05752065.pdf [firstpage_image] =>[orig_patent_app_number] => 477207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3803957 [patent_doc_number] => 05726902 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Method and apparatus for characterizing timing behavior of datapaths for integrated circuit design and fabrication' [patent_app_type] => 1 [patent_app_number] => 8/482267 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 12555 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/726/05726902.pdf [firstpage_image] =>[orig_patent_app_number] => 482267 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3700656 [patent_doc_number] => 05664107 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'Method for providing for automatic topology discovery in an ATM network or the like' [patent_app_type] => 1 [patent_app_number] => 8/473133 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 56 [patent_no_of_words] => 20601 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/664/05664107.pdf [firstpage_image] =>[orig_patent_app_number] => 473133 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3891696 [patent_doc_number] => 05748488 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Method for generating a logic circuit from a hardware independent user description using assignment conditions' [patent_app_type] => 1 [patent_app_number] => 8/478068 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 42 [patent_no_of_words] => 32622 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748488.pdf [firstpage_image] =>[orig_patent_app_number] => 478068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3596559 [patent_doc_number] => 05581781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Synthesizer for generating a logic network using a hardware independent description' [patent_app_type] => 1 [patent_app_number] => 8/482163 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 42 [patent_no_of_words] => 32540 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581781.pdf [firstpage_image] =>[orig_patent_app_number] => 482163 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3544021 [patent_doc_number] => 05583991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Method for providing for automatic topology discovery in an ATM network or the like' [patent_app_type] => 1 [patent_app_number] => 8/473139 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 56 [patent_no_of_words] => 20585 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/583/05583991.pdf [firstpage_image] =>[orig_patent_app_number] => 473139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3803172 [patent_doc_number] => 05737574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Method for generating a logic circuit from a hardware independent user description using mux conditions and hardware selectors' [patent_app_type] => 1 [patent_app_number] => 8/485432 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 42 [patent_no_of_words] => 32640 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737574.pdf [firstpage_image] =>[orig_patent_app_number] => 485432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3709244 [patent_doc_number] => 05619717 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Vector quantization using thresholds' [patent_app_type] => 1 [patent_app_number] => 8/483282 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5570 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619717.pdf [firstpage_image] =>[orig_patent_app_number] => 483282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3718243 [patent_doc_number] => 05655083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Programmable rset system and method for computer network' [patent_app_type] => 1 [patent_app_number] => 8/482344 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2850 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/655/05655083.pdf [firstpage_image] =>[orig_patent_app_number] => 482344 [rel_patent_id] =>[rel_patent_doc_number] =>)