Search

Eliseo Ramos Feliciano

Supervisory Patent Examiner (ID: 8243, Phone: (571)272-7925 , Office: P/2863 )

Most Active Art Unit
2617
Art Unit(s)
2857, 2617, 2681, 2895, 2745, 2817, 2687, 2682
Total Applications
285
Issued Applications
150
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3660668 [patent_doc_number] => 05630140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Ordered and reliable signal delivery in a distributed multiprocessor' [patent_app_type] => 1 [patent_app_number] => 8/377387 [patent_app_country] => US [patent_app_date] => 1995-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5267 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/630/05630140.pdf [firstpage_image] =>[orig_patent_app_number] => 377387 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/377387
Ordered and reliable signal delivery in a distributed multiprocessor Jan 22, 1995 Issued
Array ( [id] => 4047559 [patent_doc_number] => 05857075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Method and integrated circuit for high-bandwidth network server interfacing to a local area network' [patent_app_type] => 1 [patent_app_number] => 8/371499 [patent_app_country] => US [patent_app_date] => 1995-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6757 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/857/05857075.pdf [firstpage_image] =>[orig_patent_app_number] => 371499 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/371499
Method and integrated circuit for high-bandwidth network server interfacing to a local area network Jan 10, 1995 Issued
Array ( [id] => 3585731 [patent_doc_number] => 05539904 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Method for designation of data in a data bank and extraction' [patent_app_type] => 1 [patent_app_number] => 8/369896 [patent_app_country] => US [patent_app_date] => 1995-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3192 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539904.pdf [firstpage_image] =>[orig_patent_app_number] => 369896 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/369896
Method for designation of data in a data bank and extraction Jan 8, 1995 Issued
Array ( [id] => 3636489 [patent_doc_number] => 05594916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Neural network processing system using semiconductor memories and processing paired data in parallel' [patent_app_type] => 1 [patent_app_number] => 8/369163 [patent_app_country] => US [patent_app_date] => 1995-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 56 [patent_no_of_words] => 24406 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594916.pdf [firstpage_image] =>[orig_patent_app_number] => 369163 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/369163
Neural network processing system using semiconductor memories and processing paired data in parallel Jan 3, 1995 Issued
Array ( [id] => 3984455 [patent_doc_number] => 05887183 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Method and system in a data processing system for loading and storing vectors in a plurality of modes' [patent_app_type] => 1 [patent_app_number] => 8/368173 [patent_app_country] => US [patent_app_date] => 1995-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10332 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/887/05887183.pdf [firstpage_image] =>[orig_patent_app_number] => 368173 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/368173
Method and system in a data processing system for loading and storing vectors in a plurality of modes Jan 3, 1995 Issued
08/358572 DATA PROTECTIVE MICROPROCESSOR CIRCUIT FOR PORTABLE DATA CARRIERS, FOR EXAMPLE CREDIT CARDS Dec 12, 1994 Abandoned
Array ( [id] => 3575461 [patent_doc_number] => 05526483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'Fast network file system running over a hybrid connectionless transport' [patent_app_type] => 1 [patent_app_number] => 8/352264 [patent_app_country] => US [patent_app_date] => 1994-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 9806 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/526/05526483.pdf [firstpage_image] =>[orig_patent_app_number] => 352264 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/352264
Fast network file system running over a hybrid connectionless transport Dec 6, 1994 Issued
Array ( [id] => 3674333 [patent_doc_number] => 05649226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'Processor having multiple instruction registers' [patent_app_type] => 1 [patent_app_number] => 8/347090 [patent_app_country] => US [patent_app_date] => 1994-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 199 [patent_no_of_words] => 10912 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/649/05649226.pdf [firstpage_image] =>[orig_patent_app_number] => 347090 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/347090
Processor having multiple instruction registers Nov 22, 1994 Issued
Array ( [id] => 3903094 [patent_doc_number] => 05724572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Method and apparatus for processing null terminated character strings' [patent_app_type] => 1 [patent_app_number] => 8/341789 [patent_app_country] => US [patent_app_date] => 1994-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2436 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724572.pdf [firstpage_image] =>[orig_patent_app_number] => 341789 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/341789
Method and apparatus for processing null terminated character strings Nov 17, 1994 Issued
Array ( [id] => 3430828 [patent_doc_number] => 05435005 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-18 [patent_title] => 'Method and system for controlling resuming operation of an AC-driven computer system using an external memory' [patent_app_type] => 1 [patent_app_number] => 8/341926 [patent_app_country] => US [patent_app_date] => 1994-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 2038 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/435/05435005.pdf [firstpage_image] =>[orig_patent_app_number] => 341926 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/341926
Method and system for controlling resuming operation of an AC-driven computer system using an external memory Nov 15, 1994 Issued
Array ( [id] => 3675803 [patent_doc_number] => 05625812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Method of data structure extraction for computer systems operating under the ANSI-92 SQL2 outer join protocol' [patent_app_type] => 1 [patent_app_number] => 8/339454 [patent_app_country] => US [patent_app_date] => 1994-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2990 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 441 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625812.pdf [firstpage_image] =>[orig_patent_app_number] => 339454 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/339454
Method of data structure extraction for computer systems operating under the ANSI-92 SQL2 outer join protocol Nov 13, 1994 Issued
08/339471 METHOD AND APPARATUS FOR SWITCHING BETWEEN THE MODES OF A PROCESSOR Nov 13, 1994 Abandoned
Array ( [id] => 3544661 [patent_doc_number] => 05584033 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Apparatus and method for burst data transfer employing a pause at fixed data intervals' [patent_app_type] => 1 [patent_app_number] => 8/335228 [patent_app_country] => US [patent_app_date] => 1994-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5368 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/584/05584033.pdf [firstpage_image] =>[orig_patent_app_number] => 335228 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/335228
Apparatus and method for burst data transfer employing a pause at fixed data intervals Nov 6, 1994 Issued
Array ( [id] => 3672569 [patent_doc_number] => 05649110 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'Traffic shaping system with virtual circuit table time stamps for asynchronous transfer mode networks' [patent_app_type] => 1 [patent_app_number] => 8/335281 [patent_app_country] => US [patent_app_date] => 1994-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 15748 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/649/05649110.pdf [firstpage_image] =>[orig_patent_app_number] => 335281 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/335281
Traffic shaping system with virtual circuit table time stamps for asynchronous transfer mode networks Nov 6, 1994 Issued
Array ( [id] => 3636448 [patent_doc_number] => 05594914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Method and apparatus for accessing multiple memory devices' [patent_app_type] => 1 [patent_app_number] => 8/326677 [patent_app_country] => US [patent_app_date] => 1994-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 65 [patent_no_of_words] => 26390 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594914.pdf [firstpage_image] =>[orig_patent_app_number] => 326677 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/326677
Method and apparatus for accessing multiple memory devices Oct 19, 1994 Issued
Array ( [id] => 3547791 [patent_doc_number] => 05557773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Computational automation for global objectives' [patent_app_type] => 1 [patent_app_number] => 8/326655 [patent_app_country] => US [patent_app_date] => 1994-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 15527 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557773.pdf [firstpage_image] =>[orig_patent_app_number] => 326655 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/326655
Computational automation for global objectives Oct 18, 1994 Issued
Array ( [id] => 3708316 [patent_doc_number] => 05596765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Integrated processor including a device for multiplexing external pin signals' [patent_app_type] => 1 [patent_app_number] => 8/325906 [patent_app_country] => US [patent_app_date] => 1994-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6185 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596765.pdf [firstpage_image] =>[orig_patent_app_number] => 325906 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/325906
Integrated processor including a device for multiplexing external pin signals Oct 18, 1994 Issued
Array ( [id] => 3660921 [patent_doc_number] => 05630156 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Process for parallel operation of several computation units, especially in image processing, and corresponding architecture' [patent_app_type] => 1 [patent_app_number] => 8/324945 [patent_app_country] => US [patent_app_date] => 1994-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5514 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/630/05630156.pdf [firstpage_image] =>[orig_patent_app_number] => 324945 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/324945
Process for parallel operation of several computation units, especially in image processing, and corresponding architecture Oct 17, 1994 Issued
Array ( [id] => 3601794 [patent_doc_number] => 05517661 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Single-chip micro-computer having a plurality of operation modes' [patent_app_type] => 1 [patent_app_number] => 8/323581 [patent_app_country] => US [patent_app_date] => 1994-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517661.pdf [firstpage_image] =>[orig_patent_app_number] => 323581 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/323581
Single-chip micro-computer having a plurality of operation modes Oct 16, 1994 Issued
Array ( [id] => 3567007 [patent_doc_number] => 05574932 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-12 [patent_title] => 'One-chip microcomputer and program development/evaluation system therefor' [patent_app_type] => 1 [patent_app_number] => 8/318455 [patent_app_country] => US [patent_app_date] => 1994-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5622 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/574/05574932.pdf [firstpage_image] =>[orig_patent_app_number] => 318455 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/318455
One-chip microcomputer and program development/evaluation system therefor Oct 4, 1994 Issued
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