Search

Eliyah Stone Harper

Examiner (ID: 7925, Phone: (571)272-0759 , Office: P/2166 )

Most Active Art Unit
2166
Art Unit(s)
2166
Total Applications
989
Issued Applications
718
Pending Applications
52
Abandoned Applications
236

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11629404 [patent_doc_number] => 20170139594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'KEY-VALUE INTEGRATED TRANSLATION LAYER' [patent_app_type] => utility [patent_app_number] => 15/061873 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6385 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061873 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061873
KEY-VALUE INTEGRATED TRANSLATION LAYER Mar 3, 2016 Abandoned
Array ( [id] => 12180506 [patent_doc_number] => 20180039442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'Efficient Deduplication of Logical Units' [patent_app_type] => utility [patent_app_number] => 15/115890 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6649 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15115890 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/115890
Efficient deduplication of logical units Dec 28, 2015 Issued
Array ( [id] => 11531134 [patent_doc_number] => 20170091112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'CONFIGURABLE CACHE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/949946 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4360 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14949946 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/949946
CONFIGURABLE CACHE ARCHITECTURE Nov 23, 2015 Abandoned
Array ( [id] => 11629439 [patent_doc_number] => 20170139629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'ACCESS PROCESSOR' [patent_app_type] => utility [patent_app_number] => 14/941837 [patent_app_country] => US [patent_app_date] => 2015-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14941837 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/941837
Access processor Nov 15, 2015 Issued
Array ( [id] => 11531133 [patent_doc_number] => 20170091111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'CONFIGURABLE CACHE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/870436 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4321 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14870436 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/870436
CONFIGURABLE CACHE ARCHITECTURE Sep 29, 2015 Abandoned
Array ( [id] => 12311673 [patent_doc_number] => 09940270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Multiple request notification network for global ordering in a coherent mesh interconnect [patent_app_type] => utility [patent_app_number] => 14/838601 [patent_app_country] => US [patent_app_date] => 2015-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5535 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14838601 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/838601
Multiple request notification network for global ordering in a coherent mesh interconnect Aug 27, 2015 Issued
Array ( [id] => 10793751 [patent_doc_number] => 20160139908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'CONSTRUCTING VIRTUAL IMAGES FOR INTERDEPENDENT APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 14/836571 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9892 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14836571 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/836571
CONSTRUCTING VIRTUAL IMAGES FOR INTERDEPENDENT APPLICATIONS Aug 25, 2015 Abandoned
Array ( [id] => 10757530 [patent_doc_number] => 20160103682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'LOAD AND STORE ORDERING FOR A STRONGLY ORDERED SIMULTANEOUS MULTITHREADING CORE' [patent_app_type] => utility [patent_app_number] => 14/828632 [patent_app_country] => US [patent_app_date] => 2015-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10583 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828632 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/828632
Load and store ordering for a strongly ordered simultaneous multithreading core Aug 17, 2015 Issued
Array ( [id] => 12433665 [patent_doc_number] => 09977736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Optimized garbage collection algorithm to improve solid state drive reliability [patent_app_type] => utility [patent_app_number] => 14/798400 [patent_app_country] => US [patent_app_date] => 2015-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5198 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14798400 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/798400
Optimized garbage collection algorithm to improve solid state drive reliability Jul 12, 2015 Issued
Array ( [id] => 10644346 [patent_doc_number] => 09361218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Method of allocating referenced memory pages from a free list' [patent_app_type] => utility [patent_app_number] => 14/790604 [patent_app_country] => US [patent_app_date] => 2015-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 7414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14790604 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/790604
Method of allocating referenced memory pages from a free list Jul 1, 2015 Issued
Array ( [id] => 11193149 [patent_doc_number] => 09423963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-23 [patent_title] => 'Generalized storage allocation for multiple architectures' [patent_app_type] => utility [patent_app_number] => 14/743873 [patent_app_country] => US [patent_app_date] => 2015-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743873 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/743873
Generalized storage allocation for multiple architectures Jun 17, 2015 Issued
Array ( [id] => 10616493 [patent_doc_number] => 09335937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Method of operating a flash memory system using a migration operation' [patent_app_type] => utility [patent_app_number] => 14/718886 [patent_app_country] => US [patent_app_date] => 2015-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 9183 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14718886 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/718886
Method of operating a flash memory system using a migration operation May 20, 2015 Issued
Array ( [id] => 13891291 [patent_doc_number] => 10198192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Systems and methods for improving quality of service within hybrid storage systems [patent_app_type] => utility [patent_app_number] => 14/673898 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13629 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14673898 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/673898
Systems and methods for improving quality of service within hybrid storage systems Mar 30, 2015 Issued
Array ( [id] => 16551764 [patent_doc_number] => 10884924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Storage system and data writing control method [patent_app_type] => utility [patent_app_number] => 15/547984 [patent_app_country] => US [patent_app_date] => 2015-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10750 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 609 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15547984 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/547984
Storage system and data writing control method Mar 3, 2015 Issued
Array ( [id] => 10357334 [patent_doc_number] => 20150242338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'MEMORY DEVICE AND METHOD ENABLING PERFORMANCE OF SPECIAL OPERATIONS BY APPLICATION OF MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/628367 [patent_app_country] => US [patent_app_date] => 2015-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 13005 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14628367 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/628367
MEMORY DEVICE AND METHOD ENABLING PERFORMANCE OF SPECIAL OPERATIONS BY APPLICATION OF MEMORY DEVICE Feb 22, 2015 Abandoned
Array ( [id] => 11020012 [patent_doc_number] => 20160216965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'CLEARING SPECIFIED BLOCKS OF MAIN STORAGE' [patent_app_type] => utility [patent_app_number] => 14/606130 [patent_app_country] => US [patent_app_date] => 2015-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606130 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/606130
Clearing specified blocks of main storage Jan 26, 2015 Issued
Array ( [id] => 11006133 [patent_doc_number] => 20160203083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'SYSTEMS AND METHODS FOR PROVIDING DYNAMIC CACHE EXTENSION IN A MULTI-CLUSTER HETEROGENEOUS PROCESSOR ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/595998 [patent_app_country] => US [patent_app_date] => 2015-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5186 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14595998 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/595998
Systems and methods for providing dynamic cache extension in a multi-cluster heterogeneous processor architecture Jan 12, 2015 Issued
Array ( [id] => 11005974 [patent_doc_number] => 20160202924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'DIAGONAL ORGANIZATION OF MEMORY BLOCKS IN A CIRCULAR ORGANIZATION OF MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/596043 [patent_app_country] => US [patent_app_date] => 2015-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8399 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14596043 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/596043
DIAGONAL ORGANIZATION OF MEMORY BLOCKS IN A CIRCULAR ORGANIZATION OF MEMORIES Jan 12, 2015
Array ( [id] => 10982718 [patent_doc_number] => 20160179662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'INSTRUCTION AND LOGIC FOR PAGE TABLE WALK CHANGE-BITS' [patent_app_type] => utility [patent_app_number] => 14/580569 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 22780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14580569 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/580569
INSTRUCTION AND LOGIC FOR PAGE TABLE WALK CHANGE-BITS Dec 22, 2014 Abandoned
Array ( [id] => 11314105 [patent_doc_number] => 20160350215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'DISTRIBUTED HANG RECOVERY LOGIC' [patent_app_type] => utility [patent_app_number] => 14/891340 [patent_app_country] => US [patent_app_date] => 2014-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5087 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14891340 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/891340
Distributed hang recovery logic Dec 12, 2014 Issued
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