Search

Elizabeth Albert

Examiner (ID: 16214, Phone: (571)272-2631 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2913
Total Applications
4788
Issued Applications
4654
Pending Applications
1
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3952003 [patent_doc_number] => 05998773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Liquid heating in interaction region of microwave generator' [patent_app_type] => 1 [patent_app_number] => 9/000223 [patent_app_country] => US [patent_app_date] => 1998-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3643 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/998/05998773.pdf [firstpage_image] =>[orig_patent_app_number] => 000223 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/000223
Liquid heating in interaction region of microwave generator Jan 22, 1998 Issued
Array ( [id] => 4084623 [patent_doc_number] => 06009462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Replacing large bit component of electronic mail (e-mail) message with hot-link in distributed computer system' [patent_app_type] => 1 [patent_app_number] => 8/876605 [patent_app_country] => US [patent_app_date] => 1997-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8416 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009462.pdf [firstpage_image] =>[orig_patent_app_number] => 876605 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/876605
Replacing large bit component of electronic mail (e-mail) message with hot-link in distributed computer system Jun 15, 1997 Issued
Array ( [id] => 4236800 [patent_doc_number] => 06011910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Supporting authentication across multiple network access servers' [patent_app_type] => 1 [patent_app_number] => 8/833663 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 9476 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011910.pdf [firstpage_image] =>[orig_patent_app_number] => 833663 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/833663
Supporting authentication across multiple network access servers Apr 7, 1997 Issued
Array ( [id] => 3840073 [patent_doc_number] => 05732285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Method and apparatus for consolidated buffer handling for computer device input/output' [patent_app_type] => 1 [patent_app_number] => 8/816412 [patent_app_country] => US [patent_app_date] => 1997-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5177 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732285.pdf [firstpage_image] =>[orig_patent_app_number] => 816412 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/816412
Method and apparatus for consolidated buffer handling for computer device input/output Mar 12, 1997 Issued
Array ( [id] => 3894761 [patent_doc_number] => 05826056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Synchronous memory device and method of reading data from same' [patent_app_type] => 1 [patent_app_number] => 8/769781 [patent_app_country] => US [patent_app_date] => 1996-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 7915 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/826/05826056.pdf [firstpage_image] =>[orig_patent_app_number] => 769781 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/769781
Synchronous memory device and method of reading data from same Dec 18, 1996 Issued
Array ( [id] => 3701044 [patent_doc_number] => 05644753 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Fast, dual ported cache controller for data processors in a packet switched cache coherent multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 8/714965 [patent_app_country] => US [patent_app_date] => 1996-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 20524 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644753.pdf [firstpage_image] =>[orig_patent_app_number] => 714965 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/714965
Fast, dual ported cache controller for data processors in a packet switched cache coherent multiprocessor system Sep 16, 1996 Issued
Array ( [id] => 3900849 [patent_doc_number] => 05749087 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Method and apparatus for maintaining n-way associative directories utilizing a content addressable memory' [patent_app_type] => 1 [patent_app_number] => 8/688313 [patent_app_country] => US [patent_app_date] => 1996-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2941 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/749/05749087.pdf [firstpage_image] =>[orig_patent_app_number] => 688313 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/688313
Method and apparatus for maintaining n-way associative directories utilizing a content addressable memory Jul 29, 1996 Issued
Array ( [id] => 3871116 [patent_doc_number] => 05706470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Disk updating log recording system' [patent_app_type] => 1 [patent_app_number] => 8/673625 [patent_app_country] => US [patent_app_date] => 1996-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 10274 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706470.pdf [firstpage_image] =>[orig_patent_app_number] => 673625 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673625
Disk updating log recording system Jun 25, 1996 Issued
Array ( [id] => 3768608 [patent_doc_number] => 05721957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Method and system for storing data in cache and retrieving data from cache in a selected one of multiple data formats' [patent_app_type] => 1 [patent_app_number] => 8/659045 [patent_app_country] => US [patent_app_date] => 1996-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 6423 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721957.pdf [firstpage_image] =>[orig_patent_app_number] => 659045 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/659045
Method and system for storing data in cache and retrieving data from cache in a selected one of multiple data formats Jun 2, 1996 Issued
Array ( [id] => 3805933 [patent_doc_number] => 05737749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Method and system for dynamically sharing cache capacity in a microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/651013 [patent_app_country] => US [patent_app_date] => 1996-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4313 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737749.pdf [firstpage_image] =>[orig_patent_app_number] => 651013 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/651013
Method and system for dynamically sharing cache capacity in a microprocessor May 19, 1996 Issued
Array ( [id] => 3701290 [patent_doc_number] => 05696992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Register access control device comprising a busy/free indicating unit' [patent_app_type] => 1 [patent_app_number] => 8/644276 [patent_app_country] => US [patent_app_date] => 1996-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 9103 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696992.pdf [firstpage_image] =>[orig_patent_app_number] => 644276 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/644276
Register access control device comprising a busy/free indicating unit May 9, 1996 Issued
Array ( [id] => 3922775 [patent_doc_number] => 05752260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'High-speed, multiple-port, interleaved cache with arbitration of multiple access addresses' [patent_app_type] => 1 [patent_app_number] => 8/638655 [patent_app_country] => US [patent_app_date] => 1996-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4531 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/752/05752260.pdf [firstpage_image] =>[orig_patent_app_number] => 638655 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/638655
High-speed, multiple-port, interleaved cache with arbitration of multiple access addresses Apr 28, 1996 Issued
Array ( [id] => 3662792 [patent_doc_number] => 05684993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Segregation of thread-specific information from shared task information' [patent_app_type] => 1 [patent_app_number] => 8/632750 [patent_app_country] => US [patent_app_date] => 1996-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4348 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684993.pdf [firstpage_image] =>[orig_patent_app_number] => 632750 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632750
Segregation of thread-specific information from shared task information Apr 15, 1996 Issued
Array ( [id] => 3908428 [patent_doc_number] => 05778442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Method and apparatus for buffering data in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/621655 [patent_app_country] => US [patent_app_date] => 1996-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778442.pdf [firstpage_image] =>[orig_patent_app_number] => 621655 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/621655
Method and apparatus for buffering data in a computer system Mar 24, 1996 Issued
Array ( [id] => 3700302 [patent_doc_number] => 05696930 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'CAM accelerated buffer management' [patent_app_type] => 1 [patent_app_number] => 8/597369 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3569 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696930.pdf [firstpage_image] =>[orig_patent_app_number] => 597369 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/597369
CAM accelerated buffer management Feb 8, 1996 Issued
Array ( [id] => 3898471 [patent_doc_number] => 05765219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Apparatus and method for incrementally accessing a system memory' [patent_app_type] => 1 [patent_app_number] => 8/598539 [patent_app_country] => US [patent_app_date] => 1996-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7645 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/765/05765219.pdf [firstpage_image] =>[orig_patent_app_number] => 598539 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/598539
Apparatus and method for incrementally accessing a system memory Feb 7, 1996 Issued
Array ( [id] => 3848060 [patent_doc_number] => 05740396 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Solid state disk device having a flash memory accessed by utilizing an address conversion table to convert sector address information to a physical block number' [patent_app_type] => 1 [patent_app_number] => 8/598535 [patent_app_country] => US [patent_app_date] => 1996-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5440 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740396.pdf [firstpage_image] =>[orig_patent_app_number] => 598535 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/598535
Solid state disk device having a flash memory accessed by utilizing an address conversion table to convert sector address information to a physical block number Feb 7, 1996 Issued
Array ( [id] => 3826322 [patent_doc_number] => 05832250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Multi set cache structure having parity RAMs holding parity bits for tag data and for status data utilizing prediction circuitry that predicts and generates the needed parity bits' [patent_app_type] => 1 [patent_app_number] => 8/592089 [patent_app_country] => US [patent_app_date] => 1996-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8184 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/832/05832250.pdf [firstpage_image] =>[orig_patent_app_number] => 592089 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/592089
Multi set cache structure having parity RAMs holding parity bits for tag data and for status data utilizing prediction circuitry that predicts and generates the needed parity bits Jan 25, 1996 Issued
Array ( [id] => 3707658 [patent_doc_number] => 05680571 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Multi-processor data processing system with multiple, separate instruction and operand second level caches' [patent_app_type] => 1 [patent_app_number] => 8/579683 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 8930 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680571.pdf [firstpage_image] =>[orig_patent_app_number] => 579683 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/579683
Multi-processor data processing system with multiple, separate instruction and operand second level caches Dec 27, 1995 Issued
Array ( [id] => 3847786 [patent_doc_number] => 05740381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Expandable arbitration architecture for sharing system memory in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/577555 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3769 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740381.pdf [firstpage_image] =>[orig_patent_app_number] => 577555 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/577555
Expandable arbitration architecture for sharing system memory in a computer system Dec 21, 1995 Issued
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