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Elizabeth Albert

Examiner (ID: 7831, Phone: (571)272-2631 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2913
Total Applications
4788
Issued Applications
4654
Pending Applications
1
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18891677 [patent_doc_number] => 11870459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Universal guessing random additive noise decoding (GRAND) decoder [patent_app_type] => utility [patent_app_number] => 17/225818 [patent_app_country] => US [patent_app_date] => 2021-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 14184 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225818 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225818
Universal guessing random additive noise decoding (GRAND) decoder Apr 7, 2021 Issued
Array ( [id] => 17918751 [patent_doc_number] => 20220321147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => FIXED WEIGHT CODEWORDS FOR TERNARY MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/222660 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222660 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222660
Fixed weight codewords for ternary memory cells Apr 4, 2021 Issued
Array ( [id] => 17915693 [patent_doc_number] => 20220318089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => ERROR CHECKING DATA USED IN OFFLOADED OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/218535 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218535 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/218535
Error checking data used in offloaded operations Mar 30, 2021 Issued
Array ( [id] => 17899296 [patent_doc_number] => 20220308958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => GENERATING DIE BLOCK MAPPING AFTER DETECTED FAILURE [patent_app_type] => utility [patent_app_number] => 17/211601 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7988 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211601 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211601
Generating die block mapping after detected failure Mar 23, 2021 Issued
Array ( [id] => 17128660 [patent_doc_number] => 20210303429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => Multiple Name Space Test Systems and Methods [patent_app_type] => utility [patent_app_number] => 17/193668 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17193668 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/193668
Multiple name space test systems and methods Mar 4, 2021 Issued
Array ( [id] => 17772176 [patent_doc_number] => 11404127 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-02 [patent_title] => Read refresh to improve power on data retention for a non-volatile memory [patent_app_type] => utility [patent_app_number] => 17/173852 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 18712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17173852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/173852
Read refresh to improve power on data retention for a non-volatile memory Feb 10, 2021 Issued
Array ( [id] => 17786478 [patent_doc_number] => 11409601 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-09 [patent_title] => Memory device protection [patent_app_type] => utility [patent_app_number] => 17/158874 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10644 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158874 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158874
Memory device protection Jan 25, 2021 Issued
Array ( [id] => 17753578 [patent_doc_number] => 20220231783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => ENHANCED ERROR PROTECTION OF PAYLOAD USING DOUBLE CRC [patent_app_type] => utility [patent_app_number] => 17/152677 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17152677 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/152677
Enhanced error protection of payload using double CRC Jan 18, 2021 Issued
Array ( [id] => 17736678 [patent_doc_number] => 20220222137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => PROTECTED DATA STREAMING BETWEEN MEMORIES [patent_app_type] => utility [patent_app_number] => 17/147110 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17147110 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/147110
Protected data streaming between memories Jan 11, 2021 Issued
Array ( [id] => 18387884 [patent_doc_number] => 11658682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Methods for encoding and decoding sparse code and orthogonal sparse superposition code [patent_app_type] => utility [patent_app_number] => 17/129725 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12677 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/129725
Methods for encoding and decoding sparse code and orthogonal sparse superposition code Dec 20, 2020 Issued
Array ( [id] => 18668478 [patent_doc_number] => 11775378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Memory health status reporting [patent_app_type] => utility [patent_app_number] => 17/118455 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118455 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118455
Memory health status reporting Dec 9, 2020 Issued
Array ( [id] => 17528635 [patent_doc_number] => 11301323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Customized parameterization of read parameters after a decoding failure for solid state storage devices [patent_app_type] => utility [patent_app_number] => 17/115940 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 9043 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115940 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/115940
Customized parameterization of read parameters after a decoding failure for solid state storage devices Dec 8, 2020 Issued
Array ( [id] => 17924489 [patent_doc_number] => 11467737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Reducing probabilistic data integrity scan collisions [patent_app_type] => utility [patent_app_number] => 17/112347 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7410 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112347 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/112347
Reducing probabilistic data integrity scan collisions Dec 3, 2020 Issued
Array ( [id] => 17999614 [patent_doc_number] => 11500721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Solid-state disk and reading and writing method thereof [patent_app_type] => utility [patent_app_number] => 17/103984 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4294 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103984
Solid-state disk and reading and writing method thereof Nov 24, 2020 Issued
Array ( [id] => 17745460 [patent_doc_number] => 11393539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Systems and methods for determining change of read threshold voltage [patent_app_type] => utility [patent_app_number] => 17/100027 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 12601 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100027 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/100027
Systems and methods for determining change of read threshold voltage Nov 19, 2020 Issued
Array ( [id] => 17582624 [patent_doc_number] => 20220139479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => MEMORY TEST CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/088608 [patent_app_country] => US [patent_app_date] => 2020-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088608
Memory test circuit Nov 3, 2020 Issued
Array ( [id] => 17143808 [patent_doc_number] => 20210311821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/088900 [patent_app_country] => US [patent_app_date] => 2020-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088900 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088900
Semiconductor memory devices Nov 3, 2020 Issued
Array ( [id] => 18432264 [patent_doc_number] => 11677500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Methods and apparatus for encoding and decoding of data using concatenated polarization adjusted convolutional codes [patent_app_type] => utility [patent_app_number] => 17/039911 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 17995 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17039911 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/039911
Methods and apparatus for encoding and decoding of data using concatenated polarization adjusted convolutional codes Sep 29, 2020 Issued
Array ( [id] => 18189383 [patent_doc_number] => 11579968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Efficient management of failed memory blocks in memory sub-systems [patent_app_type] => utility [patent_app_number] => 16/947975 [patent_app_country] => US [patent_app_date] => 2020-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16947975 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/947975
Efficient management of failed memory blocks in memory sub-systems Aug 25, 2020 Issued
Array ( [id] => 16722243 [patent_doc_number] => 20210089390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => PROCESSING-IN-MEMORY (PIM) DEVICES [patent_app_type] => utility [patent_app_number] => 17/002341 [patent_app_country] => US [patent_app_date] => 2020-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002341 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/002341
Processing-in-memory (PIM) devices Aug 24, 2020 Issued
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