Search

Elli Peselev

Examiner (ID: 14966)

Most Active Art Unit
1623
Art Unit(s)
1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802
Total Applications
2819
Issued Applications
1823
Pending Applications
143
Abandoned Applications
853

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11845758 [patent_doc_number] => 09733309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Built-in self-test circuit' [patent_app_type] => utility [patent_app_number] => 14/962626 [patent_app_country] => US [patent_app_date] => 2015-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2537 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14962626 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/962626
Built-in self-test circuit Dec 7, 2015 Issued
Array ( [id] => 10816197 [patent_doc_number] => 20160162358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'MICROCONTROLLER' [patent_app_type] => utility [patent_app_number] => 14/962105 [patent_app_country] => US [patent_app_date] => 2015-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2756 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14962105 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/962105
Microcontroller Dec 7, 2015 Issued
Array ( [id] => 12337266 [patent_doc_number] => 09948427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => High speed add-compare-select for Viterbi decoder [patent_app_type] => utility [patent_app_number] => 14/961228 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5949 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961228 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/961228
High speed add-compare-select for Viterbi decoder Dec 6, 2015 Issued
Array ( [id] => 12378243 [patent_doc_number] => 09960984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-01 [patent_title] => Device performance monitoring [patent_app_type] => utility [patent_app_number] => 14/961089 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7118 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961089 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/961089
Device performance monitoring Dec 6, 2015 Issued
Array ( [id] => 13679719 [patent_doc_number] => 20160378596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => CONTROLLER, SEMICONDUCTOR MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 14/960009 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14960009 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/960009
Controller, semiconductor memory system and operating method thereof Dec 3, 2015 Issued
Array ( [id] => 12475002 [patent_doc_number] => 09990252 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-05 [patent_title] => Data storage system performance management [patent_app_type] => utility [patent_app_number] => 14/959474 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8399 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959474 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/959474
Data storage system performance management Dec 3, 2015 Issued
Array ( [id] => 13710701 [patent_doc_number] => 20170366305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => METHOD AND USER EQUIPMENT FOR TRANSMITTING HARQ ACK/NACK FOR DOWNLINK DATA WHEN USING MORE THAN FIVE CELLS ACCORDING TO CARRIER AGGREGATION [patent_app_type] => utility [patent_app_number] => 15/534455 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15534455 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/534455
Method and user equipment for transmitting HARQ ACK/NACK for downlink data when using more than five cells according to carrier aggregation Dec 3, 2015 Issued
Array ( [id] => 12045711 [patent_doc_number] => 09823304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Integrated electronic device having a test architecture, and test method thereof' [patent_app_type] => utility [patent_app_number] => 14/958093 [patent_app_country] => US [patent_app_date] => 2015-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6888 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14958093 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/958093
Integrated electronic device having a test architecture, and test method thereof Dec 2, 2015 Issued
Array ( [id] => 12166984 [patent_doc_number] => 09885751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Dynamic process for adaptive tests' [patent_app_type] => utility [patent_app_number] => 14/958462 [patent_app_country] => US [patent_app_date] => 2015-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 10488 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14958462 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/958462
Dynamic process for adaptive tests Dec 2, 2015 Issued
Array ( [id] => 11029567 [patent_doc_number] => 20160226522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'SELECTING A DATA STORAGE RESOURCE OF A DISPERSED STORAGE NETWORK' [patent_app_type] => utility [patent_app_number] => 14/956818 [patent_app_country] => US [patent_app_date] => 2015-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 61 [patent_no_of_words] => 42479 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956818 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956818
Selecting a data storage resource of a dispersed storage network Dec 1, 2015 Issued
Array ( [id] => 13044449 [patent_doc_number] => 10044371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Systems and methods for repair rate control for large erasure coded data storage [patent_app_type] => utility [patent_app_number] => 14/954702 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 31434 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14954702 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/954702
Systems and methods for repair rate control for large erasure coded data storage Nov 29, 2015 Issued
Array ( [id] => 11666932 [patent_doc_number] => 20170155651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'COMPUTER NETWORK CROSS-BOUNDARY PROTECTION' [patent_app_type] => utility [patent_app_number] => 14/953359 [patent_app_country] => US [patent_app_date] => 2015-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2805 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953359 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953359
Computer network cross-boundary protection Nov 28, 2015 Issued
Array ( [id] => 11926328 [patent_doc_number] => 09793923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'LDPC post-processor architecture and method for low error floor conditions' [patent_app_type] => utility [patent_app_number] => 14/950659 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 14395 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14950659 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/950659
LDPC post-processor architecture and method for low error floor conditions Nov 23, 2015 Issued
Array ( [id] => 12336957 [patent_doc_number] => 09948324 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-17 [patent_title] => System and method for informational reduction [patent_app_type] => utility [patent_app_number] => 14/950754 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14950754 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/950754
System and method for informational reduction Nov 23, 2015 Issued
Array ( [id] => 11578422 [patent_doc_number] => 09633690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Cycle-slip resilient iterative data storage read channel architecture' [patent_app_type] => utility [patent_app_number] => 14/930636 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 13163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930636 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930636
Cycle-slip resilient iterative data storage read channel architecture Nov 1, 2015 Issued
Array ( [id] => 12062490 [patent_doc_number] => 20170338835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'Method for Reconstructing a Data Packet Incorrectly Received in a Wireless Sensor Network' [patent_app_type] => utility [patent_app_number] => 15/521495 [patent_app_country] => US [patent_app_date] => 2015-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6485 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15521495 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/521495
Method for reconstructing a data packet incorrectly received in a wireless sensor network Oct 22, 2015 Issued
Array ( [id] => 10688062 [patent_doc_number] => 20160034207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'SYSTEMS AND METHODS TO IMPROVE THE RELIABILITY AND LIFESPAN OF FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 14/882603 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882603 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882603
Systems and methods to improve the reliability and lifespan of flash memory Oct 13, 2015 Issued
Array ( [id] => 11070012 [patent_doc_number] => 20160266975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'MEMORY DEVICES AND MODULES' [patent_app_type] => utility [patent_app_number] => 14/863446 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863446 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863446
Memory devices and modules Sep 22, 2015 Issued
Array ( [id] => 10741500 [patent_doc_number] => 20160087652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'Apparatus and Method for Transmitting/Receiving Signal in Communication System Supporting Bit-Interleaved Coded Modulation with Iterative Decoding Scheme' [patent_app_type] => utility [patent_app_number] => 14/860007 [patent_app_country] => US [patent_app_date] => 2015-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10066 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14860007 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/860007
Apparatus and method for transmitting/receiving signal in communication system supporting bit-interleaved coded modulation with iterative decoding scheme Sep 20, 2015 Issued
Array ( [id] => 12255998 [patent_doc_number] => 09928141 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-27 [patent_title] => 'Exploiting variable media size in grid encoded data storage systems' [patent_app_type] => utility [patent_app_number] => 14/860706 [patent_app_country] => US [patent_app_date] => 2015-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 43718 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14860706 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/860706
Exploiting variable media size in grid encoded data storage systems Sep 20, 2015 Issued
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