Search

Elli Peselev

Examiner (ID: 14966)

Most Active Art Unit
1623
Art Unit(s)
1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802
Total Applications
2819
Issued Applications
1823
Pending Applications
143
Abandoned Applications
853

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10660399 [patent_doc_number] => 20160006543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'Low Complexity Error Correction' [patent_app_type] => utility [patent_app_number] => 14/788150 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14788150 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/788150
Low complexity error correction Jun 29, 2015 Issued
Array ( [id] => 10986156 [patent_doc_number] => 20160183101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'WI-FI ROUTING' [patent_app_type] => utility [patent_app_number] => 14/788463 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3718 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14788463 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/788463
Wi-Fi routing Jun 29, 2015 Issued
Array ( [id] => 11681963 [patent_doc_number] => 09680507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Offset selection for error correction data' [patent_app_type] => utility [patent_app_number] => 14/749474 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9816 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14749474 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/749474
Offset selection for error correction data Jun 23, 2015 Issued
Array ( [id] => 11109722 [patent_doc_number] => 20160306693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'READ VOLTAGE LEVEL ESTIMATING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT' [patent_app_type] => utility [patent_app_number] => 14/745472 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12388 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14745472 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/745472
Read voltage level estimating method, memory storage device and memory control circuit unit Jun 21, 2015 Issued
Array ( [id] => 10793683 [patent_doc_number] => 20160139840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'ERROR TOLERANT OR STREAMING STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/743797 [patent_app_country] => US [patent_app_date] => 2015-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4938 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743797 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/743797
Error tolerant or streaming storage device Jun 17, 2015 Issued
Array ( [id] => 12048037 [patent_doc_number] => 09825652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-21 [patent_title] => 'Inter-facility network traffic optimization for redundancy coded data storage systems' [patent_app_type] => utility [patent_app_number] => 14/742683 [patent_app_country] => US [patent_app_date] => 2015-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 24950 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14742683 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/742683
Inter-facility network traffic optimization for redundancy coded data storage systems Jun 16, 2015 Issued
Array ( [id] => 11791088 [patent_doc_number] => 09400715 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-26 [patent_title] => 'System and method for interconnecting storage elements' [patent_app_type] => utility [patent_app_number] => 14/734230 [patent_app_country] => US [patent_app_date] => 2015-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 36 [patent_no_of_words] => 9796 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14734230 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/734230
System and method for interconnecting storage elements Jun 8, 2015 Issued
Array ( [id] => 12250873 [patent_doc_number] => 09923665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'System and method for forward error correction' [patent_app_type] => utility [patent_app_number] => 14/732074 [patent_app_country] => US [patent_app_date] => 2015-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 8156 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14732074 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/732074
System and method for forward error correction Jun 4, 2015 Issued
Array ( [id] => 10632229 [patent_doc_number] => 09350391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-24 [patent_title] => 'System and method for dynamic scaling of LDPC decoder in a solid state drive' [patent_app_type] => utility [patent_app_number] => 14/722673 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3550 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722673 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722673
System and method for dynamic scaling of LDPC decoder in a solid state drive May 26, 2015 Issued
Array ( [id] => 12101924 [patent_doc_number] => 09859022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Memory device having a shareable error correction code cell array' [patent_app_type] => utility [patent_app_number] => 14/722823 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 14749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722823 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722823
Memory device having a shareable error correction code cell array May 26, 2015 Issued
Array ( [id] => 11687926 [patent_doc_number] => 09685979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-20 [patent_title] => 'Circuitry and method for generating cyclic redundancy check signatures' [patent_app_type] => utility [patent_app_number] => 14/720516 [patent_app_country] => US [patent_app_date] => 2015-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720516 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/720516
Circuitry and method for generating cyclic redundancy check signatures May 21, 2015 Issued
Array ( [id] => 11700602 [patent_doc_number] => 09690517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Dual-mode error-correction code/write-once memory codec' [patent_app_type] => utility [patent_app_number] => 14/720442 [patent_app_country] => US [patent_app_date] => 2015-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5513 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720442 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/720442
Dual-mode error-correction code/write-once memory codec May 21, 2015 Issued
Array ( [id] => 15761761 [patent_doc_number] => 10623018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Method of arrangement of an algorithm in cyclic redundancy check [patent_app_type] => utility [patent_app_number] => 15/573674 [patent_app_country] => US [patent_app_date] => 2015-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1840 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15573674 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/573674
Method of arrangement of an algorithm in cyclic redundancy check May 19, 2015 Issued
Array ( [id] => 11681958 [patent_doc_number] => 09680502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Message page integrity verification in automotive network auto-negotiation' [patent_app_type] => utility [patent_app_number] => 14/705590 [patent_app_country] => US [patent_app_date] => 2015-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14705590 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/705590
Message page integrity verification in automotive network auto-negotiation May 5, 2015 Issued
Array ( [id] => 10344437 [patent_doc_number] => 20150229442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'Impulse and/or burst noise signal to noise ratio (SNR) aware concatenated forward error correction (FEC)' [patent_app_type] => utility [patent_app_number] => 14/695231 [patent_app_country] => US [patent_app_date] => 2015-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14695231 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/695231
Impulse and/or burst noise signal to noise ratio (SNR) aware concatenated forward error correction (FEC) Apr 23, 2015 Issued
Array ( [id] => 11659931 [patent_doc_number] => 09672942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Data decoding method of non-volatile memory device and apparatus for performing the method' [patent_app_type] => utility [patent_app_number] => 14/693446 [patent_app_country] => US [patent_app_date] => 2015-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 38 [patent_no_of_words] => 15561 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14693446 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/693446
Data decoding method of non-volatile memory device and apparatus for performing the method Apr 21, 2015 Issued
Array ( [id] => 11452189 [patent_doc_number] => 09575835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Error correction in a memory device' [patent_app_type] => utility [patent_app_number] => 14/692092 [patent_app_country] => US [patent_app_date] => 2015-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 32 [patent_no_of_words] => 11180 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14692092 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/692092
Error correction in a memory device Apr 20, 2015 Issued
Array ( [id] => 11579526 [patent_doc_number] => 09634799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Decoding device, information transmission system, and non-transitory computer readable medium' [patent_app_type] => utility [patent_app_number] => 14/689850 [patent_app_country] => US [patent_app_date] => 2015-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 6938 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14689850 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/689850
Decoding device, information transmission system, and non-transitory computer readable medium Apr 16, 2015 Issued
Array ( [id] => 10442207 [patent_doc_number] => 20150327219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'METHOD AND APPARATUS FOR PROCESSING A DOWNLINK SHARED CHANNEL' [patent_app_type] => utility [patent_app_number] => 14/687858 [patent_app_country] => US [patent_app_date] => 2015-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4549 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14687858 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/687858
Method and apparatus for processing a downlink shared channel Apr 14, 2015 Issued
Array ( [id] => 10617337 [patent_doc_number] => 09336784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Apparatus, system and method for merging code layers for audio encoding and decoding and error correction thereof' [patent_app_type] => utility [patent_app_number] => 14/685984 [patent_app_country] => US [patent_app_date] => 2015-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 11429 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14685984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/685984
Apparatus, system and method for merging code layers for audio encoding and decoding and error correction thereof Apr 13, 2015 Issued
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