Search

Elli Peselev

Examiner (ID: 14966)

Most Active Art Unit
1623
Art Unit(s)
1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802
Total Applications
2819
Issued Applications
1823
Pending Applications
143
Abandoned Applications
853

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10424851 [patent_doc_number] => 20150309861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'DATA BUS DRIVING CIRCUIT, AND SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/685471 [patent_app_country] => US [patent_app_date] => 2015-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11945 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14685471 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/685471
Data bus driving circuit, and semiconductor device and semiconductor memory device including the same Apr 12, 2015 Issued
Array ( [id] => 13269065 [patent_doc_number] => 10146617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Error control in memory storage systems [patent_app_type] => utility [patent_app_number] => 14/685316 [patent_app_country] => US [patent_app_date] => 2015-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9491 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14685316 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/685316
Error control in memory storage systems Apr 12, 2015 Issued
Array ( [id] => 11104460 [patent_doc_number] => 20160301429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'METHODS AND SYSTEMS FOR SOFT-DECISION DECODING' [patent_app_type] => utility [patent_app_number] => 14/683656 [patent_app_country] => US [patent_app_date] => 2015-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14683656 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/683656
Methods and systems for soft-decision decoding Apr 9, 2015 Issued
Array ( [id] => 11416725 [patent_doc_number] => 09563553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Data storing method and embedded system' [patent_app_type] => utility [patent_app_number] => 14/681095 [patent_app_country] => US [patent_app_date] => 2015-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4993 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14681095 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/681095
Data storing method and embedded system Apr 7, 2015 Issued
Array ( [id] => 12334197 [patent_doc_number] => 09947399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Updating resistive memory [patent_app_type] => utility [patent_app_number] => 14/669731 [patent_app_country] => US [patent_app_date] => 2015-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 11411 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14669731 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/669731
Updating resistive memory Mar 25, 2015 Issued
Array ( [id] => 10816193 [patent_doc_number] => 20160162353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'STORAGE PARAMETERS FOR A DATA STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/659404 [patent_app_country] => US [patent_app_date] => 2015-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 18869 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14659404 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/659404
Storage parameters for a data storage device Mar 15, 2015 Issued
Array ( [id] => 11638678 [patent_doc_number] => 09660668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Forward error correction (FEC) for local area networks (LANs)' [patent_app_type] => utility [patent_app_number] => 14/656839 [patent_app_country] => US [patent_app_date] => 2015-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 12298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656839 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/656839
Forward error correction (FEC) for local area networks (LANs) Mar 12, 2015 Issued
Array ( [id] => 10726381 [patent_doc_number] => 20160072529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'STORAGE DEVICE AND MEMORY CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/638477 [patent_app_country] => US [patent_app_date] => 2015-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14638477 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/638477
STORAGE DEVICE AND MEMORY CONTROL METHOD Mar 3, 2015 Abandoned
Array ( [id] => 11524293 [patent_doc_number] => 09607703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Memory system' [patent_app_type] => utility [patent_app_number] => 14/639044 [patent_app_country] => US [patent_app_date] => 2015-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6784 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639044 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/639044
Memory system Mar 3, 2015 Issued
Array ( [id] => 10376597 [patent_doc_number] => 20150261604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/637293 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14637293 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/637293
Memory system Mar 2, 2015 Issued
Array ( [id] => 11418097 [patent_doc_number] => 09564930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Memory controller, storage device and memory control method' [patent_app_type] => utility [patent_app_number] => 14/636768 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8080 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14636768 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/636768
Memory controller, storage device and memory control method Mar 2, 2015 Issued
Array ( [id] => 10293161 [patent_doc_number] => 20150178160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'Transforming Data in a Distributed Storage and Task Network' [patent_app_type] => utility [patent_app_number] => 14/635178 [patent_app_country] => US [patent_app_date] => 2015-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 79 [patent_figures_cnt] => 79 [patent_no_of_words] => 61295 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14635178 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/635178
Transforming data in a distributed storage and task network Mar 1, 2015 Issued
Array ( [id] => 11681961 [patent_doc_number] => 09680504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Controller, semiconductor memory system, data storage system and operating method thereof' [patent_app_type] => utility [patent_app_number] => 14/634182 [patent_app_country] => US [patent_app_date] => 2015-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 17864 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14634182 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/634182
Controller, semiconductor memory system, data storage system and operating method thereof Feb 26, 2015 Issued
Array ( [id] => 11056265 [patent_doc_number] => 20160253227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'Error Detection Circuitry For Use With Memory' [patent_app_type] => utility [patent_app_number] => 14/633062 [patent_app_country] => US [patent_app_date] => 2015-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11260 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14633062 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/633062
Error detection circuitry for use with memory Feb 25, 2015 Issued
Array ( [id] => 10793827 [patent_doc_number] => 20160139984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'DATA STORAGE DEVICE AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/631389 [patent_app_country] => US [patent_app_date] => 2015-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3708 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14631389 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/631389
Data storage device and operating method thereof Feb 24, 2015 Issued
Array ( [id] => 11374650 [patent_doc_number] => 09543949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Differential signal reversion and correction circuit and method thereof' [patent_app_type] => utility [patent_app_number] => 14/627391 [patent_app_country] => US [patent_app_date] => 2015-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2298 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14627391 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/627391
Differential signal reversion and correction circuit and method thereof Feb 19, 2015 Issued
Array ( [id] => 11049711 [patent_doc_number] => 20160246670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'ERROR CORRECTION FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/627570 [patent_app_country] => US [patent_app_date] => 2015-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14627570 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/627570
Error correction for non-volatile memory Feb 19, 2015 Issued
Array ( [id] => 11044304 [patent_doc_number] => 20160241260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND 16-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME' [patent_app_type] => utility [patent_app_number] => 14/626169 [patent_app_country] => US [patent_app_date] => 2015-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6882 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14626169 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/626169
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 16-symbol mapping, and bit interleaving method using same Feb 18, 2015 Issued
Array ( [id] => 11510962 [patent_doc_number] => 09602135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same' [patent_app_type] => utility [patent_app_number] => 14/625550 [patent_app_country] => US [patent_app_date] => 2015-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7038 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14625550 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/625550
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same Feb 17, 2015 Issued
Array ( [id] => 11036927 [patent_doc_number] => 20160233883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'LOW POWER LOW-DENSITY PARITY-CHECK DECODING' [patent_app_type] => utility [patent_app_number] => 14/615686 [patent_app_country] => US [patent_app_date] => 2015-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 20985 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14615686 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/615686
Low power low-density parity-check decoding Feb 5, 2015 Issued
Menu