Elli Peselev
Examiner (ID: 14966)
Most Active Art Unit | 1623 |
Art Unit(s) | 1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802 |
Total Applications | 2819 |
Issued Applications | 1823 |
Pending Applications | 143 |
Abandoned Applications | 853 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
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[patent_title] => 'Devices and methods for reconstructing corrupted control channel bits'
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Array
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[patent_issue_date] => 2016-09-06
[patent_title] => 'Checksum adder'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/211383 | Checksum adder | Mar 13, 2014 | Issued |
Array
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[id] => 10052482
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[patent_issue_date] => 2015-07-28
[patent_title] => 'Programmable data write management system and method for operating the same in a solid state drive'
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Array
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[patent_issue_date] => 2014-06-26
[patent_title] => 'System and Method for Mitigating Burst Noise in a Communications System'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/194922 | System and method for mitigating burst noise in a communications system | Mar 2, 2014 | Issued |
Array
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[patent_title] => 'MITIGATION OF WRITE ERRORS IN MULTI-LEVEL CELL FLASH MEMORY THROUGH ADAPTIVE ERROR CORRECTION CODE DECODING'
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Array
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[patent_title] => 'Method for iterative error correction with designed error floor performance'
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Array
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[patent_issue_date] => 2014-09-25
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR SELF TEST OF SEMICONDUCTOR INTEGRATED CIRCUIT'
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Array
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[id] => 10610755
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[patent_title] => 'Testing memory devices with distributed processing operations'
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Array
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Array
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[patent_title] => 'Test Architecture for Characterizing Interconnects in Stacked Designs'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/183305 | Test architecture for characterizing interconnects in stacked designs | Feb 17, 2014 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/176624 | Decoder based data recovery | Feb 9, 2014 | Issued |
Array
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