Search

Elli Peselev

Examiner (ID: 14966)

Most Active Art Unit
1623
Art Unit(s)
1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802
Total Applications
2819
Issued Applications
1823
Pending Applications
143
Abandoned Applications
853

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10873323 [patent_doc_number] => 08898544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'DRAM error detection, evaluation, and correction' [patent_app_type] => utility [patent_app_number] => 13/710561 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3192 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710561 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/710561
DRAM error detection, evaluation, and correction Dec 10, 2012 Issued
Array ( [id] => 8827790 [patent_doc_number] => 20130128835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'METHOD AND APPARATUS FOR PROCESSING A DOWNLINK SHARED CHANNEL' [patent_app_type] => utility [patent_app_number] => 13/711501 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4549 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711501 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/711501
Method and apparatus for processing a downlink shared channel Dec 10, 2012 Issued
Array ( [id] => 9207725 [patent_doc_number] => 20140006902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING ECC CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/711024 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2268 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711024 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/711024
Semiconductor device including ECC circuit Dec 10, 2012 Issued
Array ( [id] => 9540207 [patent_doc_number] => 20140164854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'pBIST ARCHITECTURE WITH MULTIPLE ASYNCHRONOUS SUB CHIPS OPERATING IN DIFFERRING VOLTAGE DOMAINS' [patent_app_type] => utility [patent_app_number] => 13/709168 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2414 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709168 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/709168
pBIST architecture with multiple asynchronous sub chips operating in differing voltage domains Dec 9, 2012 Issued
Array ( [id] => 9879035 [patent_doc_number] => 08966331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Test circuit of semiconductor memory apparatus and semiconductor memory system including the same' [patent_app_type] => utility [patent_app_number] => 13/709644 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3444 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709644 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/709644
Test circuit of semiconductor memory apparatus and semiconductor memory system including the same Dec 9, 2012 Issued
Array ( [id] => 9540197 [patent_doc_number] => 20140164844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'pBIST ENGINE WITH DISTRIBUTED DATA LOGGING' [patent_app_type] => utility [patent_app_number] => 13/709220 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2954 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709220 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/709220
pBIST engine with distributed data logging Dec 9, 2012 Issued
Array ( [id] => 9540210 [patent_doc_number] => 20140164857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'Testing Disk Drives Shared by Multiple Processors in a Supercomputer Complex' [patent_app_type] => utility [patent_app_number] => 13/709452 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5607 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709452 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/709452
Testing disk drives shared by multiple processors in a supercomputer complex Dec 9, 2012 Issued
Array ( [id] => 9947641 [patent_doc_number] => 08996969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Low density parity check decoder with miscorrection handling' [patent_app_type] => utility [patent_app_number] => 13/708941 [patent_app_country] => US [patent_app_date] => 2012-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8391 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13708941 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/708941
Low density parity check decoder with miscorrection handling Dec 7, 2012 Issued
Array ( [id] => 9540206 [patent_doc_number] => 20140164853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'MEMORY OPERATION OF PAIRED MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/707675 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6081 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13707675 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/707675
Memory operation of paired memory devices Dec 6, 2012 Issued
Array ( [id] => 9961339 [patent_doc_number] => 09009564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Storing data in a distributed storage network' [patent_app_type] => utility [patent_app_number] => 13/707471 [patent_app_country] => US [patent_app_date] => 2012-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 78 [patent_figures_cnt] => 83 [patent_no_of_words] => 61837 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13707471 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/707471
Storing data in a distributed storage network Dec 5, 2012 Issued
Array ( [id] => 9967921 [patent_doc_number] => 09015556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Transforming data in a distributed storage and task network' [patent_app_type] => utility [patent_app_number] => 13/707542 [patent_app_country] => US [patent_app_date] => 2012-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 78 [patent_figures_cnt] => 83 [patent_no_of_words] => 61800 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13707542 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/707542
Transforming data in a distributed storage and task network Dec 5, 2012 Issued
Array ( [id] => 10156865 [patent_doc_number] => 09188636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Self evaluation of system on a chip with multiple cores' [patent_app_type] => utility [patent_app_number] => 13/707365 [patent_app_country] => US [patent_app_date] => 2012-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4903 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13707365 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/707365
Self evaluation of system on a chip with multiple cores Dec 5, 2012 Issued
Array ( [id] => 9879037 [patent_doc_number] => 08966332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Apparatus and method for self-testing a component for signal recovery' [patent_app_type] => utility [patent_app_number] => 13/706887 [patent_app_country] => US [patent_app_date] => 2012-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5421 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13706887 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/706887
Apparatus and method for self-testing a component for signal recovery Dec 5, 2012 Issued
Array ( [id] => 9520580 [patent_doc_number] => 20140157072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'SELF EVALUATION OF SYSTEM ON A CHIP WITH MULTIPLE CORES' [patent_app_type] => utility [patent_app_number] => 13/705353 [patent_app_country] => US [patent_app_date] => 2012-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4903 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13705353 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/705353
Self evaluation of system on a chip with multiple cores Dec 4, 2012 Issued
Array ( [id] => 8769435 [patent_doc_number] => 20130097472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'Systems and Methods for Out of Order Y-Sample Memory Management' [patent_app_type] => utility [patent_app_number] => 13/705407 [patent_app_country] => US [patent_app_date] => 2012-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13705407 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/705407
Systems and methods for out of order Y-sample memory management Dec 4, 2012 Issued
Array ( [id] => 9891641 [patent_doc_number] => 08977916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Using data watchpoints to detect unitialized memory reads' [patent_app_type] => utility [patent_app_number] => 13/693484 [patent_app_country] => US [patent_app_date] => 2012-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1223 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13693484 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/693484
Using data watchpoints to detect unitialized memory reads Dec 3, 2012 Issued
Array ( [id] => 9886044 [patent_doc_number] => 08972829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Method and apparatus for umbrella coding' [patent_app_type] => utility [patent_app_number] => 13/693861 [patent_app_country] => US [patent_app_date] => 2012-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13693861 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/693861
Method and apparatus for umbrella coding Dec 3, 2012 Issued
Array ( [id] => 9871626 [patent_doc_number] => 08959418 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-17 [patent_title] => 'Forward error correction' [patent_app_type] => utility [patent_app_number] => 13/691501 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691501 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691501
Forward error correction Nov 29, 2012 Issued
Array ( [id] => 10098843 [patent_doc_number] => 09135155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Storage and retrieval of shaped data' [patent_app_type] => utility [patent_app_number] => 13/690275 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 14626 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690275 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690275
Storage and retrieval of shaped data Nov 29, 2012 Issued
Array ( [id] => 9853070 [patent_doc_number] => 08954817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Storage apparatus and controller' [patent_app_type] => utility [patent_app_number] => 13/691063 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 8933 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691063 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691063
Storage apparatus and controller Nov 29, 2012 Issued
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