Elli Peselev

Array ( [id] => 9814597 [patent_doc_number] => 20150026542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'Method, Device and System For Packet Transmission Over IP Networks' [patent_app_type] => utility [patent_app_number] => 14/382748 [patent_app_country] => US [patent_app_date] => 2012-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5985 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14382748 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8383340 [patent_doc_number] => 20120226961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'EFFICIENT REDUNDANT MEMORY UNIT ARRAY' [patent_app_type] => utility [patent_app_number] => 13/411606 [patent_app_country] => US [patent_app_date] => 2012-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4224 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13411606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9807985 [patent_doc_number] => 20150019930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'APPARATUS AND METHOD FOR DESIGNING QUANTUM CODE' [patent_app_type] => utility [patent_app_number] => 14/377781 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2441 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14377781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9652247 [patent_doc_number] => 08806282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Data integrity field (DIF) implementation with error detection and intelligent recovery mechanism' [patent_app_type] => utility [patent_app_number] => 13/398509 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9227 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10860798 [patent_doc_number] => 08887016 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-11 [patent_title] => 'IC and a method of testing a transceiver of the IC' [patent_app_type] => utility [patent_app_number] => 13/372354 [patent_app_country] => US [patent_app_date] => 2012-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4803 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13372354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8337386 [patent_doc_number] => 20120204085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'WIRELESS APPARATUS AND METHOD FOR DE-MASKING A PACKET' [patent_app_type] => utility [patent_app_number] => 13/367245 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3810 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367245 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9472479 [patent_doc_number] => 08726128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Non-volatile memory module, non-volatile memory processing system, and non-volatile memory managing method thereof' [patent_app_type] => utility [patent_app_number] => 13/364329 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1933 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8952803 [patent_doc_number] => 20130198584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'Systems and Methods for Multi-Pass Alternate Decoding' [patent_app_type] => utility [patent_app_number] => 13/362409 [patent_app_country] => US [patent_app_date] => 2012-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11296 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13362409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8201900 [patent_doc_number] => 20120124451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'OPTIMIZING THE SIZE OF MEMORY DEVICES USED FOR ERROR CORRECTION CODE STORAGE' [patent_app_type] => utility [patent_app_number] => 13/359163 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124451.pdf [firstpage_image] =>[orig_patent_app_number] => 13359163 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8315021 [patent_doc_number] => 20120192042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Soft Decoding of CRC Component Codes' [patent_app_type] => utility [patent_app_number] => 13/357890 [patent_app_country] => US [patent_app_date] => 2012-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8045 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13357890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8941901 [patent_doc_number] => 20130191698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'HIERARCHICAL CHANNEL MARKING IN A MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/353925 [patent_app_country] => US [patent_app_date] => 2012-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9900 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13353925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9500157 [patent_doc_number] => 08738999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Information processing apparatus, communication control method, and communication control system' [patent_app_type] => utility [patent_app_number] => 13/353568 [patent_app_country] => US [patent_app_date] => 2012-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5676 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13353568 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8941898 [patent_doc_number] => 20130191695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'IMPLEMENTING ENHANCED PSEUDO RANDOM PATTERN GENERATORS WITH HIERARCHICAL LINEAR FEEDBACK SHIFT REGISTERS (LFSRs)' [patent_app_type] => utility [patent_app_number] => 13/353727 [patent_app_country] => US [patent_app_date] => 2012-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3020 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13353727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8722708 [patent_doc_number] => 20130073926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'MEMORY WITH ON-CHIP ERROR CORRECTION' [patent_app_type] => utility [patent_app_number] => 13/351179 [patent_app_country] => US [patent_app_date] => 2012-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9490 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8929847 [patent_doc_number] => 20130185607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'SCAN TEST CIRCUITRY CONFIGURED FOR BYPASSING SELECTED SEGMENTS OF A MULTI-SEGMENT SCAN CHAIN' [patent_app_type] => utility [patent_app_number] => 13/348979 [patent_app_country] => US [patent_app_date] => 2012-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13348979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10577780 [patent_doc_number] => 09300438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Method and system for transmitting large object' [patent_app_type] => utility [patent_app_number] => 14/351628 [patent_app_country] => US [patent_app_date] => 2012-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4024 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14351628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8230064 [patent_doc_number] => 20120144270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-07 [patent_title] => 'STORAGE SUBSYSTEM CAPABLE OF ADJUSTING ECC SETTINGS BASED ON MONITORED CONDITIONS' [patent_app_type] => utility [patent_app_number] => 13/344502 [patent_app_country] => US [patent_app_date] => 2012-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6370 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13344502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8360806 [patent_doc_number] => 20120215960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'DEVICE FOR INCREASING CHIP TESTING EFFICIENCY AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/344580 [patent_app_country] => US [patent_app_date] => 2012-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3683 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13344580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8794318 [patent_doc_number] => 20130111287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'MEMORY STORAGE DEVICE, MEMORY CONTROLLER THEREOF, AND DATA TRANSMISSION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/342204 [patent_app_country] => US [patent_app_date] => 2012-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9129 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13342204 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10834761 [patent_doc_number] => 08862955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Apparatus for at-speed testing, in inter-domain mode, of a multi-clock-domain digital integrated circuit according to BIST or SCAN techniques' [patent_app_type] => utility [patent_app_number] => 13/340560 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6773 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340560 [rel_patent_id] =>[rel_patent_doc_number] =>)