
Elli Peselev
Examiner (ID: 14966)
Most Active Art Unit | 1623 |
Art Unit(s) | 1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802 |
Total Applications | 2819 |
Issued Applications | 1823 |
Pending Applications | 143 |
Abandoned Applications | 853 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9599194
[patent_doc_number] => 20140195876
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-10
[patent_title] => 'Memory Module Architecture'
[patent_app_type] => utility
[patent_app_number] => 13/993506
[patent_app_country] => US
[patent_app_date] => 2011-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2389
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13993506
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/993506 | Memory module architecture | Dec 27, 2011 | Issued |
Array
(
[id] => 8143577
[patent_doc_number] => 20120096335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-19
[patent_title] => 'DATA PROCESSING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/336647
[patent_app_country] => US
[patent_app_date] => 2011-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8828
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0096/20120096335.pdf
[firstpage_image] =>[orig_patent_app_number] => 13336647
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/336647 | DATA PROCESSING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT | Dec 22, 2011 | Abandoned |
Array
(
[id] => 9225048
[patent_doc_number] => 20140019823
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-16
[patent_title] => 'CONTENT-AWARE CACHES FOR RELIABILITY'
[patent_app_type] => utility
[patent_app_number] => 13/992504
[patent_app_country] => US
[patent_app_date] => 2011-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 14144
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13992504
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/992504 | Content-aware caches for reliability | Dec 21, 2011 | Issued |
Array
(
[id] => 8893802
[patent_doc_number] => 20130166986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-27
[patent_title] => 'USING ECC ENCODING TO VERIFY AN ECC DECODE OPERATION'
[patent_app_type] => utility
[patent_app_number] => 13/335393
[patent_app_country] => US
[patent_app_date] => 2011-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6317
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335393
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/335393 | Using ECC encoding to verify an ECC decode operation | Dec 21, 2011 | Issued |
Array
(
[id] => 9416909
[patent_doc_number] => 08700961
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-15
[patent_title] => 'Controller and method for virtual LUN assignment for improved memory bank mapping'
[patent_app_type] => utility
[patent_app_number] => 13/330975
[patent_app_country] => US
[patent_app_date] => 2011-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5331
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330975
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/330975 | Controller and method for virtual LUN assignment for improved memory bank mapping | Dec 19, 2011 | Issued |
Array
(
[id] => 10847793
[patent_doc_number] => 08874994
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Systems and methods of storing data'
[patent_app_type] => utility
[patent_app_number] => 13/329757
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 32046
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329757
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/329757 | Systems and methods of storing data | Dec 18, 2011 | Issued |
Array
(
[id] => 8619431
[patent_doc_number] => 20130024743
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-24
[patent_title] => 'SYSTEMS AND METHODS OF STORING DATA'
[patent_app_type] => utility
[patent_app_number] => 13/329788
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 32098
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329788
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/329788 | Systems and methods of storing data | Dec 18, 2011 | Issued |
Array
(
[id] => 8130693
[patent_doc_number] => 20120089894
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-12
[patent_title] => 'Detection Of Duplicate Packets'
[patent_app_type] => utility
[patent_app_number] => 13/329416
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3291
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20120089894.pdf
[firstpage_image] =>[orig_patent_app_number] => 13329416
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/329416 | Detection of duplicate packets | Dec 18, 2011 | Issued |
Array
(
[id] => 9218480
[patent_doc_number] => 08631290
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-14
[patent_title] => 'Automated detection of and compensation for guardband degradation during operation of clocked data processing circuit'
[patent_app_type] => utility
[patent_app_number] => 13/327561
[patent_app_country] => US
[patent_app_date] => 2011-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 14732
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327561
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/327561 | Automated detection of and compensation for guardband degradation during operation of clocked data processing circuit | Dec 14, 2011 | Issued |
Array
(
[id] => 9458621
[patent_doc_number] => 08719647
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-06
[patent_title] => 'Read bias management to reduce read errors for phase change memory'
[patent_app_type] => utility
[patent_app_number] => 13/327673
[patent_app_country] => US
[patent_app_date] => 2011-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 6529
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327673
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/327673 | Read bias management to reduce read errors for phase change memory | Dec 14, 2011 | Issued |
Array
(
[id] => 9555729
[patent_doc_number] => 08762802
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-24
[patent_title] => 'Code checking method for a memory of a printed circuit board'
[patent_app_type] => utility
[patent_app_number] => 13/379847
[patent_app_country] => US
[patent_app_date] => 2011-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1719
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13379847
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/379847 | Code checking method for a memory of a printed circuit board | Dec 1, 2011 | Issued |
Array
(
[id] => 8627016
[patent_doc_number] => 08359520
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-22
[patent_title] => 'Detection, avoidance and/or correction of problematic puncturing patterns in parity bit streams used when implementing turbo codes'
[patent_app_type] => utility
[patent_app_number] => 13/309962
[patent_app_country] => US
[patent_app_date] => 2011-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 12622
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13309962
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/309962 | Detection, avoidance and/or correction of problematic puncturing patterns in parity bit streams used when implementing turbo codes | Dec 1, 2011 | Issued |
Array
(
[id] => 9820978
[patent_doc_number] => 08930781
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-01-06
[patent_title] => 'Method and apparatus for defect recovery'
[patent_app_type] => utility
[patent_app_number] => 13/301199
[patent_app_country] => US
[patent_app_date] => 2011-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 6786
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301199
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/301199 | Method and apparatus for defect recovery | Nov 20, 2011 | Issued |
Array
(
[id] => 7783317
[patent_doc_number] => 20120044873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-23
[patent_title] => 'METHOD AND APPARATUS FOR PROCESSING A DOWNLINK SHARED CHANNEL'
[patent_app_type] => utility
[patent_app_number] => 13/285831
[patent_app_country] => US
[patent_app_date] => 2011-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4550
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20120044873.pdf
[firstpage_image] =>[orig_patent_app_number] => 13285831
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/285831 | Method and apparatus for processing a downlink shared channel | Oct 30, 2011 | Issued |
Array
(
[id] => 10907552
[patent_doc_number] => 20140310566
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-16
[patent_title] => 'System and Method to Detect and Communicate Loss and Retention of Synchronization in a Real-Time Data Transfer Scheme'
[patent_app_type] => utility
[patent_app_number] => 13/879137
[patent_app_country] => US
[patent_app_date] => 2011-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 12596
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13879137
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/879137 | System and method to detect and communicate loss and retention of synchronization in a real-time data transfer scheme | Oct 17, 2011 | Issued |
Array
(
[id] => 8343167
[patent_doc_number] => 08245108
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-14
[patent_title] => 'Semiconductor memory device and method for driving the same'
[patent_app_type] => utility
[patent_app_number] => 13/275854
[patent_app_country] => US
[patent_app_date] => 2011-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4764
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275854
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/275854 | Semiconductor memory device and method for driving the same | Oct 17, 2011 | Issued |
Array
(
[id] => 8881399
[patent_doc_number] => 20130154583
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'DYNAMIC VOLTAGE SCALING SYSTEM BASED ON ON-CHIP MONITORING AND VOLTAGE PREDICTION'
[patent_app_type] => utility
[patent_app_number] => 13/700426
[patent_app_country] => US
[patent_app_date] => 2011-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3328
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13700426
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/700426 | Dynamic voltage scaling system based on on-chip monitoring and voltage prediction | Oct 16, 2011 | Issued |
Array
(
[id] => 7759961
[patent_doc_number] => 20120030535
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-02
[patent_title] => 'Distributed Block Coding (DBC)'
[patent_app_type] => utility
[patent_app_number] => 13/233843
[patent_app_country] => US
[patent_app_date] => 2011-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12019
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0030/20120030535.pdf
[firstpage_image] =>[orig_patent_app_number] => 13233843
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/233843 | Distributed block coding (DBC) | Sep 14, 2011 | Issued |
Array
(
[id] => 9458655
[patent_doc_number] => 08719681
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-06
[patent_title] => 'Diagnostic tool for metrology errors caused by communication activities'
[patent_app_type] => utility
[patent_app_number] => 13/232235
[patent_app_country] => US
[patent_app_date] => 2011-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 11121
[patent_no_of_claims] => 57
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13232235
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/232235 | Diagnostic tool for metrology errors caused by communication activities | Sep 13, 2011 | Issued |
Array
(
[id] => 9326282
[patent_doc_number] => 08661319
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-25
[patent_title] => 'Memory system'
[patent_app_type] => utility
[patent_app_number] => 13/232312
[patent_app_country] => US
[patent_app_date] => 2011-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 58
[patent_figures_cnt] => 89
[patent_no_of_words] => 41840
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13232312
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/232312 | Memory system | Sep 13, 2011 | Issued |