Search

Elli Peselev

Examiner (ID: 14966)

Most Active Art Unit
1623
Art Unit(s)
1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802
Total Applications
2819
Issued Applications
1823
Pending Applications
143
Abandoned Applications
853

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9652280 [patent_doc_number] => 08806317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Method for coding and decoding digital data, particularly data processed in a microprocessor unit' [patent_app_type] => utility [patent_app_number] => 13/379363 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4223 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13379363 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/379363
Method for coding and decoding digital data, particularly data processed in a microprocessor unit Jun 21, 2010 Issued
Array ( [id] => 6644360 [patent_doc_number] => 20100313091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'APPARATUS AND METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/794183 [patent_app_country] => US [patent_app_date] => 2010-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4620 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0313/20100313091.pdf [firstpage_image] =>[orig_patent_app_number] => 12794183 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/794183
APPARATUS AND METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT Jun 3, 2010 Abandoned
Array ( [id] => 8799547 [patent_doc_number] => 08438436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-05-07 [patent_title] => 'Secure design-for-test scan chains' [patent_app_type] => utility [patent_app_number] => 12/794221 [patent_app_country] => US [patent_app_date] => 2010-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12794221 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/794221
Secure design-for-test scan chains Jun 3, 2010 Issued
Array ( [id] => 8728404 [patent_doc_number] => 08407545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Communication device' [patent_app_type] => utility [patent_app_number] => 12/792319 [patent_app_country] => US [patent_app_date] => 2010-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7022 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 377 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792319 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792319
Communication device Jun 1, 2010 Issued
Array ( [id] => 8810383 [patent_doc_number] => 08448050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Memory system and control method for the same' [patent_app_type] => utility [patent_app_number] => 12/791210 [patent_app_country] => US [patent_app_date] => 2010-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 8316 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12791210 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/791210
Memory system and control method for the same May 31, 2010 Issued
Array ( [id] => 8655507 [patent_doc_number] => 08375275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Electronic storage device and control method thereof' [patent_app_type] => utility [patent_app_number] => 12/790786 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3475 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12790786 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/790786
Electronic storage device and control method thereof May 27, 2010 Issued
Array ( [id] => 6396728 [patent_doc_number] => 20100318862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'SCAN TEST CIRCUIT, AND METHOD AND PROGRAM FOR DESIGNING SAME' [patent_app_type] => utility [patent_app_number] => 12/789594 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5260 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20100318862.pdf [firstpage_image] =>[orig_patent_app_number] => 12789594 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/789594
Scan test circuit, and method and program for designing same May 27, 2010 Issued
Array ( [id] => 8924030 [patent_doc_number] => 08489979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Methods and devices to reduce outer code failure rate variability' [patent_app_type] => utility [patent_app_number] => 12/790126 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6403 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12790126 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/790126
Methods and devices to reduce outer code failure rate variability May 27, 2010 Issued
Array ( [id] => 7512785 [patent_doc_number] => 20110258495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'METHODS OF CALCULATING COMPENSATION VOLTAGE AND ADJUSTING THRESHOLD VOLTAGE AND MEMORY APPARATUS AND CONTROLLER' [patent_app_type] => utility [patent_app_number] => 12/788649 [patent_app_country] => US [patent_app_date] => 2010-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7212 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20110258495.pdf [firstpage_image] =>[orig_patent_app_number] => 12788649 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788649
Methods of calculating compensation voltage and adjusting threshold voltage and memory apparatus and controller May 26, 2010 Issued
Array ( [id] => 8741207 [patent_doc_number] => 08412993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Self-adjusting critical path timing of multi-core VLSI chip' [patent_app_type] => utility [patent_app_number] => 12/788987 [patent_app_country] => US [patent_app_date] => 2010-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3831 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12788987 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788987
Self-adjusting critical path timing of multi-core VLSI chip May 26, 2010 Issued
Array ( [id] => 6171785 [patent_doc_number] => 20110197107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND DATA PROCESSING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/785940 [patent_app_country] => US [patent_app_date] => 2010-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3436 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20110197107.pdf [firstpage_image] =>[orig_patent_app_number] => 12785940 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785940
Non-volatile memory device and data processing method thereof May 23, 2010 Issued
Array ( [id] => 6414745 [patent_doc_number] => 20100306630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'SYSTEM FOR SENDING SIGNALS BETWEEN MODULES' [patent_app_type] => utility [patent_app_number] => 12/785884 [patent_app_country] => US [patent_app_date] => 2010-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4203 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20100306630.pdf [firstpage_image] =>[orig_patent_app_number] => 12785884 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785884
System for sending signals between modules May 23, 2010 Issued
Array ( [id] => 8678770 [patent_doc_number] => 08386905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Error correcting method, and memory controller and memory storage system using the same' [patent_app_type] => utility [patent_app_number] => 12/785729 [patent_app_country] => US [patent_app_date] => 2010-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 10731 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785729 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785729
Error correcting method, and memory controller and memory storage system using the same May 23, 2010 Issued
Array ( [id] => 8655502 [patent_doc_number] => 08375270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Signal transmission method and transmitter in radio multiplex transmission system' [patent_app_type] => utility [patent_app_number] => 12/785859 [patent_app_country] => US [patent_app_date] => 2010-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5117 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785859 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785859
Signal transmission method and transmitter in radio multiplex transmission system May 23, 2010 Issued
Array ( [id] => 8667598 [patent_doc_number] => 08381071 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-19 [patent_title] => 'Systems and methods for decoder sharing between data sets' [patent_app_type] => utility [patent_app_number] => 12/785413 [patent_app_country] => US [patent_app_date] => 2010-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15658 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785413 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785413
Systems and methods for decoder sharing between data sets May 20, 2010 Issued
Array ( [id] => 8716197 [patent_doc_number] => 08402348 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-03-19 [patent_title] => 'Systems and methods for variable data processing using a central queue' [patent_app_type] => utility [patent_app_number] => 12/785416 [patent_app_country] => US [patent_app_date] => 2010-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 23462 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785416 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785416
Systems and methods for variable data processing using a central queue May 20, 2010 Issued
Array ( [id] => 8667601 [patent_doc_number] => 08381074 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-19 [patent_title] => 'Systems and methods for utilizing a centralized queue based data processing circuit' [patent_app_type] => utility [patent_app_number] => 12/785418 [patent_app_country] => US [patent_app_date] => 2010-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 23257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785418 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785418
Systems and methods for utilizing a centralized queue based data processing circuit May 20, 2010 Issued
Array ( [id] => 6057483 [patent_doc_number] => 20110113281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'DATA STORAGE SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/783698 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20110113281.pdf [firstpage_image] =>[orig_patent_app_number] => 12783698 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/783698
Data storage system and method May 19, 2010 Issued
Array ( [id] => 6414645 [patent_doc_number] => 20100306616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'RECEIVING APPARATUS, RECEIVING METHOD AND PROGRAM, AND RECEIVING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/783291 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11395 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20100306616.pdf [firstpage_image] =>[orig_patent_app_number] => 12783291 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/783291
Receiving apparatus, receiving method and program, and receiving system May 18, 2010 Issued
Array ( [id] => 8214097 [patent_doc_number] => 20120131413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'APPARATUS, SYSTEM, AND METHOD TO INCREASE DATA INTEGRITY IN A REDUNDANT STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/321484 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 36298 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20120131413.pdf [firstpage_image] =>[orig_patent_app_number] => 13321484 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/321484
Apparatus, system, and method to increase data integrity in a redundant storage system May 17, 2010 Issued
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