Elli Peselev

Array ( [id] => 5167244 [patent_doc_number] => 20070288833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Communication channel with reed-solomon encoding and single parity check' [patent_app_type] => utility [patent_app_number] => 11/450317 [patent_app_country] => US [patent_app_date] => 2006-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20070288833.pdf [firstpage_image] =>[orig_patent_app_number] => 11450317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4589817 [patent_doc_number] => 07861131 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-12-28 [patent_title] => 'Tensor product codes containing an iterative code' [patent_app_type] => utility [patent_app_number] => 11/449066 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 12139 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/861/07861131.pdf [firstpage_image] =>[orig_patent_app_number] => 11449066 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4472551 [patent_doc_number] => 07937645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/443109 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8202 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/937/07937645.pdf [firstpage_image] =>[orig_patent_app_number] => 11443109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 582282 [patent_doc_number] => 07472328 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-30 [patent_title] => 'Automatic testing of microprocessor bus integrity' [patent_app_type] => utility [patent_app_number] => 11/437370 [patent_app_country] => US [patent_app_date] => 2006-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/472/07472328.pdf [firstpage_image] =>[orig_patent_app_number] => 11437370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5114972 [patent_doc_number] => 20070198888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'HARD-DECISION ITERATION DECODING BASED ON AN ERROR-CORRECTING CODE WITH A LOW UNDECECTABLE ERROR PROBABILITY' [patent_app_type] => utility [patent_app_number] => 11/380820 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1733 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20070198888.pdf [firstpage_image] =>[orig_patent_app_number] => 11380820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8011033 [patent_doc_number] => 08086934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Decoding apparatus and decoding method' [patent_app_type] => utility [patent_app_number] => 11/912481 [patent_app_country] => US [patent_app_date] => 2006-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 35 [patent_no_of_words] => 41393 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/086/08086934.pdf [firstpage_image] =>[orig_patent_app_number] => 11912481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 69102 [patent_doc_number] => 07761771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'High reliability memory module with a fault tolerant address and command bus' [patent_app_type] => utility [patent_app_number] => 11/406718 [patent_app_country] => US [patent_app_date] => 2006-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10594 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/761/07761771.pdf [firstpage_image] =>[orig_patent_app_number] => 11406718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8022823 [patent_doc_number] => 08140930 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-03-20 [patent_title] => 'Encoder and decoder by LDPC coding' [patent_app_type] => utility [patent_app_number] => 11/914328 [patent_app_country] => US [patent_app_date] => 2006-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15563 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140930.pdf [firstpage_image] =>[orig_patent_app_number] => 11914328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 171938 [patent_doc_number] => 07669106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-02-23 [patent_title] => 'Optimization of low density parity check (LDPC) building blocks using multi-input Gilbert cells' [patent_app_type] => utility [patent_app_number] => 11/405646 [patent_app_country] => US [patent_app_date] => 2006-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6163 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/669/07669106.pdf [firstpage_image] =>[orig_patent_app_number] => 11405646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5849818 [patent_doc_number] => 20060233009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Interleaving and de-interleaving methods, wireless apparatus and semiconductor apparatus of same' [patent_app_type] => utility [patent_app_number] => 11/393547 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 12071 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20060233009.pdf [firstpage_image] =>[orig_patent_app_number] => 11393547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5212171 [patent_doc_number] => 20070250755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Dormant error checker' [patent_app_type] => utility [patent_app_number] => 11/393178 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20070250755.pdf [firstpage_image] =>[orig_patent_app_number] => 11393178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 206595 [patent_doc_number] => 07634714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Decoding system for eight-to-fourteen modulation or eight-to-sixteen modulation' [patent_app_type] => utility [patent_app_number] => 11/390205 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 2518 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/634/07634714.pdf [firstpage_image] =>[orig_patent_app_number] => 11390205 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7595709 [patent_doc_number] => 07620873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'Encoder, decoder, methods of encoding and decoding' [patent_app_type] => utility [patent_app_number] => 11/385493 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8699 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/620/07620873.pdf [firstpage_image] =>[orig_patent_app_number] => 11385493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5064938 [patent_doc_number] => 20070226580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Validating data using processor instructions' [patent_app_type] => utility [patent_app_number] => 11/384527 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6094 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20070226580.pdf [firstpage_image] =>[orig_patent_app_number] => 11384527 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5137582 [patent_doc_number] => 20070079211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'Cyclic redundancy check circuit and communication system having the same for multi-channel communication' [patent_app_type] => utility [patent_app_number] => 11/376278 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20070079211.pdf [firstpage_image] =>[orig_patent_app_number] => 11376278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5696138 [patent_doc_number] => 20060156285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Virtual display driver' [patent_app_type] => utility [patent_app_number] => 11/374932 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2922 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20060156285.pdf [firstpage_image] =>[orig_patent_app_number] => 11374932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5132581 [patent_doc_number] => 20070208978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'DVI link with circuit and method for test' [patent_app_type] => utility [patent_app_number] => 11/358265 [patent_app_country] => US [patent_app_date] => 2006-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5480 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20070208978.pdf [firstpage_image] =>[orig_patent_app_number] => 11358265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 333174 [patent_doc_number] => 07512867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-31 [patent_title] => 'Method for encoding/decoding error correcting code, transmitting apparatus and network' [patent_app_type] => utility [patent_app_number] => 11/344579 [patent_app_country] => US [patent_app_date] => 2006-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 24901 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/512/07512867.pdf [firstpage_image] =>[orig_patent_app_number] => 11344579 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 265602 [patent_doc_number] => 07571376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-04 [patent_title] => 'Viterbi decoder for executing trace-back work in parallel and decoding method' [patent_app_type] => utility [patent_app_number] => 11/340490 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4903 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/571/07571376.pdf [firstpage_image] =>[orig_patent_app_number] => 11340490 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4761292 [patent_doc_number] => 20080313518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'Communication Device, Communication System, Communication Method, Communication Program, and Communication Circuit' [patent_app_type] => utility [patent_app_number] => 11/883234 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 85 [patent_figures_cnt] => 85 [patent_no_of_words] => 67005 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0313/20080313518.pdf [firstpage_image] =>[orig_patent_app_number] => 11883234 [rel_patent_id] =>[rel_patent_doc_number] =>)