Search

Elli Peselev

Examiner (ID: 14966)

Most Active Art Unit
1623
Art Unit(s)
1673, 2899, 1623, 1621, 1203, 1803, 1211, 1802
Total Applications
2819
Issued Applications
1823
Pending Applications
143
Abandoned Applications
853

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7333655 [patent_doc_number] => 20040255225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Control circuit for error checking and correction and memory controller' [patent_app_type] => new [patent_app_number] => 10/765066 [patent_app_country] => US [patent_app_date] => 2004-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4555 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255225.pdf [firstpage_image] =>[orig_patent_app_number] => 10765066 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/765066
Control circuit for error checking and correction and memory controller Jan 27, 2004 Abandoned
Array ( [id] => 396865 [patent_doc_number] => 07299398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-20 [patent_title] => 'Data generating method for forming desired CRC code' [patent_app_type] => utility [patent_app_number] => 10/765191 [patent_app_country] => US [patent_app_date] => 2004-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 9772 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/299/07299398.pdf [firstpage_image] =>[orig_patent_app_number] => 10765191 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/765191
Data generating method for forming desired CRC code Jan 27, 2004 Issued
Array ( [id] => 7266779 [patent_doc_number] => 20040243889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'N-dimensional determination of bit-error rates' [patent_app_type] => new [patent_app_number] => 10/765271 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4670 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20040243889.pdf [firstpage_image] =>[orig_patent_app_number] => 10765271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/765271
N-dimensional determination of bit-error rates Jan 26, 2004 Abandoned
Array ( [id] => 7185897 [patent_doc_number] => 20050125708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Method for streamlining error connection code computation while reading or programming a NAND flash memory' [patent_app_type] => utility [patent_app_number] => 10/764670 [patent_app_country] => US [patent_app_date] => 2004-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4422 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20050125708.pdf [firstpage_image] =>[orig_patent_app_number] => 10764670 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/764670
Method for streamlining error connection code computation while reading or programming a NAND flash memory Jan 25, 2004 Issued
Array ( [id] => 6985528 [patent_doc_number] => 20050154956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Detection of errors' [patent_app_type] => utility [patent_app_number] => 10/756439 [patent_app_country] => US [patent_app_date] => 2004-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9479 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20050154956.pdf [firstpage_image] =>[orig_patent_app_number] => 10756439 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/756439
Detection of errors Jan 11, 2004 Issued
Array ( [id] => 427916 [patent_doc_number] => 07272768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-18 [patent_title] => 'Edge incremental redundancy memory structure and memory management' [patent_app_type] => utility [patent_app_number] => 10/731804 [patent_app_country] => US [patent_app_date] => 2003-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8585 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/272/07272768.pdf [firstpage_image] =>[orig_patent_app_number] => 10731804 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/731804
Edge incremental redundancy memory structure and memory management Dec 8, 2003 Issued
Array ( [id] => 7675887 [patent_doc_number] => 20040153940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Apparatus and method for error correction in a CDMA mobile communication system' [patent_app_type] => new [patent_app_number] => 10/727625 [patent_app_country] => US [patent_app_date] => 2003-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5606 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20040153940.pdf [firstpage_image] =>[orig_patent_app_number] => 10727625 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/727625
Apparatus and method for error correction in a CDMA mobile communication system Dec 4, 2003 Issued
Array ( [id] => 633502 [patent_doc_number] => 07134068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-07 [patent_title] => 'Channel processing data without leading sync mark' [patent_app_type] => utility [patent_app_number] => 10/638910 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6856 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/134/07134068.pdf [firstpage_image] =>[orig_patent_app_number] => 10638910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/638910
Channel processing data without leading sync mark Dec 3, 2003 Issued
Array ( [id] => 7675888 [patent_doc_number] => 20040153939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Error detection/correction system, and controller using this system' [patent_app_type] => new [patent_app_number] => 10/726561 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2847 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20040153939.pdf [firstpage_image] =>[orig_patent_app_number] => 10726561 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/726561
Error detection/correction system, and controller using this system Dec 3, 2003 Issued
Array ( [id] => 7601869 [patent_doc_number] => 07237177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-26 [patent_title] => 'Method of calculating internal signals for use in a map algorithm' [patent_app_type] => utility [patent_app_number] => 10/727910 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4780 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/237/07237177.pdf [firstpage_image] =>[orig_patent_app_number] => 10727910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/727910
Method of calculating internal signals for use in a map algorithm Dec 3, 2003 Issued
Array ( [id] => 7000006 [patent_doc_number] => 20050138516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Decoding Reed-Solomon codes and related codes represented by graphs' [patent_app_type] => utility [patent_app_number] => 10/728338 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 15657 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20050138516.pdf [firstpage_image] =>[orig_patent_app_number] => 10728338 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/728338
Decoding Reed-Solomon codes and related codes represented by graphs Dec 3, 2003 Issued
Array ( [id] => 7457897 [patent_doc_number] => 20040187069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Detection, avoidance and/or correction of problematic puncturing patterns in parity bit streams used when implementing turbo codes' [patent_app_type] => new [patent_app_number] => 10/725779 [patent_app_country] => US [patent_app_date] => 2003-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12680 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20040187069.pdf [firstpage_image] =>[orig_patent_app_number] => 10725779 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/725779
Detection, avoidance and/or correction of problematic puncturing patterns in parity bit streams used when implementing turbo codes Dec 1, 2003 Issued
Array ( [id] => 7149242 [patent_doc_number] => 20050120287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Branch metric computation and add-compare-select operation in viterbi decoders' [patent_app_type] => utility [patent_app_number] => 10/724655 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20050120287.pdf [firstpage_image] =>[orig_patent_app_number] => 10724655 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/724655
Branch metric computation and add-compare-select operation in viterbi decoders Nov 30, 2003 Issued
Array ( [id] => 5528998 [patent_doc_number] => 20090199075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'Array form reed-solomon implementation as an instruction set extension' [patent_app_type] => utility [patent_app_number] => 10/722011 [patent_app_country] => US [patent_app_date] => 2003-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15861 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20090199075.pdf [firstpage_image] =>[orig_patent_app_number] => 10722011 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/722011
Array form reed-solomon implementation as an instruction set extension Nov 24, 2003 Abandoned
Array ( [id] => 535504 [patent_doc_number] => 07194672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'CRC verification apparatus with constant delay and method thereof' [patent_app_type] => utility [patent_app_number] => 10/723551 [patent_app_country] => US [patent_app_date] => 2003-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3239 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/194/07194672.pdf [firstpage_image] =>[orig_patent_app_number] => 10723551 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/723551
CRC verification apparatus with constant delay and method thereof Nov 24, 2003 Issued
Array ( [id] => 494144 [patent_doc_number] => 07219288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-15 [patent_title] => 'Running minimum message passing LDPC decoding' [patent_app_type] => utility [patent_app_number] => 10/536226 [patent_app_country] => US [patent_app_date] => 2003-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 5981 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/219/07219288.pdf [firstpage_image] =>[orig_patent_app_number] => 10536226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/536226
Running minimum message passing LDPC decoding Nov 13, 2003 Issued
Array ( [id] => 407336 [patent_doc_number] => 07290201 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-30 [patent_title] => 'Scheme for eliminating the effects of duty cycle asymmetry in clock-forwarded double data rate interface applications' [patent_app_type] => utility [patent_app_number] => 10/706813 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 2901 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/290/07290201.pdf [firstpage_image] =>[orig_patent_app_number] => 10706813 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/706813
Scheme for eliminating the effects of duty cycle asymmetry in clock-forwarded double data rate interface applications Nov 11, 2003 Issued
Array ( [id] => 7211329 [patent_doc_number] => 20040071065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Method and apparatus for testing copy protected compact discs' [patent_app_type] => new [patent_app_number] => 10/705422 [patent_app_country] => US [patent_app_date] => 2003-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5660 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20040071065.pdf [firstpage_image] =>[orig_patent_app_number] => 10705422 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/705422
Method and apparatus for testing copy protected compact discs Nov 9, 2003 Abandoned
Array ( [id] => 5830723 [patent_doc_number] => 20060064622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Communications protocol' [patent_app_type] => utility [patent_app_number] => 10/534656 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3662 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20060064622.pdf [firstpage_image] =>[orig_patent_app_number] => 10534656 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/534656
Communications protocol Oct 29, 2003 Issued
Array ( [id] => 919001 [patent_doc_number] => 07328394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'Adaptative forward error control scheme' [patent_app_type] => utility [patent_app_number] => 10/532927 [patent_app_country] => US [patent_app_date] => 2003-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2447 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/328/07328394.pdf [firstpage_image] =>[orig_patent_app_number] => 10532927 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/532927
Adaptative forward error control scheme Oct 15, 2003 Issued
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