Search

Elly Gerald Stoica

Examiner (ID: 13856, Phone: (571)272-9941 , Office: P/1647 )

Most Active Art Unit
1647
Art Unit(s)
1647, 1646
Total Applications
1381
Issued Applications
805
Pending Applications
99
Abandoned Applications
477

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5475981 [patent_doc_number] => 20090249147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'FAULT DIAGNOSIS OF COMPRESSED TEST RESPONSES' [patent_app_type] => utility [patent_app_number] => 12/405828 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 28847 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20090249147.pdf [firstpage_image] =>[orig_patent_app_number] => 12405828 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405828
Fault diagnosis of compressed test responses Mar 16, 2009 Issued
Array ( [id] => 4487078 [patent_doc_number] => 07870446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Information processing apparatus and nonvolatile semiconductor memory drive' [patent_app_type] => utility [patent_app_number] => 12/390282 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8542 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/870/07870446.pdf [firstpage_image] =>[orig_patent_app_number] => 12390282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/390282
Information processing apparatus and nonvolatile semiconductor memory drive Feb 19, 2009 Issued
Array ( [id] => 6363790 [patent_doc_number] => 20100332939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'DECODING APPARATUS, DECODING METHOD, AND PROGRAM' [patent_app_type] => utility [patent_app_number] => 12/810091 [patent_app_country] => US [patent_app_date] => 2009-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2685 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332939.pdf [firstpage_image] =>[orig_patent_app_number] => 12810091 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/810091
Decoding apparatus, decoding method, and program Jan 18, 2009 Issued
Array ( [id] => 9392462 [patent_doc_number] => 08689087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Method and entity for probabilistic symmetrical encryption' [patent_app_type] => utility [patent_app_number] => 12/810187 [patent_app_country] => US [patent_app_date] => 2009-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6130 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12810187 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/810187
Method and entity for probabilistic symmetrical encryption Jan 8, 2009 Issued
Array ( [id] => 4449034 [patent_doc_number] => 07865786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Scanned memory testing of multi-port memory arrays' [patent_app_type] => utility [patent_app_number] => 12/349652 [patent_app_country] => US [patent_app_date] => 2009-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3514 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/865/07865786.pdf [firstpage_image] =>[orig_patent_app_number] => 12349652 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/349652
Scanned memory testing of multi-port memory arrays Jan 6, 2009 Issued
Array ( [id] => 86757 [patent_doc_number] => 07747915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'System and method for improving the yield of integrated circuits containing memory' [patent_app_type] => utility [patent_app_number] => 12/348856 [patent_app_country] => US [patent_app_date] => 2009-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2189 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/747/07747915.pdf [firstpage_image] =>[orig_patent_app_number] => 12348856 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/348856
System and method for improving the yield of integrated circuits containing memory Jan 4, 2009 Issued
Array ( [id] => 6640477 [patent_doc_number] => 20100005355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'INTERFERENCE AVOIDANCE WITH SYNCHRONOUS HARQ AND PERSISTENT SCHEDULING' [patent_app_type] => utility [patent_app_number] => 12/347862 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3432 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20100005355.pdf [firstpage_image] =>[orig_patent_app_number] => 12347862 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347862
Interference avoidance with synchronous HARQ and persistent scheduling Dec 30, 2008 Issued
Array ( [id] => 8849362 [patent_doc_number] => 08458562 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-04 [patent_title] => 'Secondary memory element for non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/346015 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5835 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12346015 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346015
Secondary memory element for non-volatile memory Dec 29, 2008 Issued
Array ( [id] => 5305814 [patent_doc_number] => 20090300466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'ERROR CORRECTION METHOD AND ERROR CORRECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/346548 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6820 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20090300466.pdf [firstpage_image] =>[orig_patent_app_number] => 12346548 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346548
ERROR CORRECTION METHOD AND ERROR CORRECTION CIRCUIT Dec 29, 2008 Abandoned
Array ( [id] => 5437904 [patent_doc_number] => 20090172491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'METHODS AND SYSTEMS FOR ERROR DETECTION OF DATA TRANSMISSION' [patent_app_type] => utility [patent_app_number] => 12/345278 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3958 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20090172491.pdf [firstpage_image] =>[orig_patent_app_number] => 12345278 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345278
Methods and systems for error detection of data transmission Dec 28, 2008 Issued
Array ( [id] => 6447634 [patent_doc_number] => 20100169744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'Progressively Programming Flash Memory While Maintaining Constant Error Correction Codes' [patent_app_type] => utility [patent_app_number] => 12/345312 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3933 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169744.pdf [firstpage_image] =>[orig_patent_app_number] => 12345312 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345312
Progressively programming flash memory while maintaining constant error correction codes Dec 28, 2008 Issued
Array ( [id] => 5486920 [patent_doc_number] => 20090276685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'DATA DECODING APPARATUS, MAGNETIC DISK APPARATUS, AND DATA DECODING METHOD' [patent_app_type] => utility [patent_app_number] => 12/345578 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4521 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20090276685.pdf [firstpage_image] =>[orig_patent_app_number] => 12345578 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345578
DATA DECODING APPARATUS, MAGNETIC DISK APPARATUS, AND DATA DECODING METHOD Dec 28, 2008 Abandoned
Array ( [id] => 7525041 [patent_doc_number] => 08028211 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-09-27 [patent_title] => 'Look-ahead built-in self tests with temperature elevation of functional elements' [patent_app_type] => utility [patent_app_number] => 12/268854 [patent_app_country] => US [patent_app_date] => 2008-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 9584 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/028/08028211.pdf [firstpage_image] =>[orig_patent_app_number] => 12268854 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/268854
Look-ahead built-in self tests with temperature elevation of functional elements Nov 10, 2008 Issued
Array ( [id] => 5584174 [patent_doc_number] => 20090103376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/252724 [patent_app_country] => US [patent_app_date] => 2008-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 15375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20090103376.pdf [firstpage_image] =>[orig_patent_app_number] => 12252724 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252724
SEMICONDUCTOR MEMORY DEVICE Oct 15, 2008 Abandoned
Array ( [id] => 8011013 [patent_doc_number] => 08086924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Implementing diagnosis of transitional scan chain defects using logic built in self test LBIST test patterns' [patent_app_type] => utility [patent_app_number] => 12/250085 [patent_app_country] => US [patent_app_date] => 2008-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/086/08086924.pdf [firstpage_image] =>[orig_patent_app_number] => 12250085 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/250085
Implementing diagnosis of transitional scan chain defects using logic built in self test LBIST test patterns Oct 12, 2008 Issued
Array ( [id] => 6511762 [patent_doc_number] => 20100095166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'Protocol Aware Error Ratio Tester' [patent_app_type] => utility [patent_app_number] => 12/248959 [patent_app_country] => US [patent_app_date] => 2008-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2363 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20100095166.pdf [firstpage_image] =>[orig_patent_app_number] => 12248959 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/248959
Protocol aware error ratio tester Oct 9, 2008 Issued
Array ( [id] => 8208220 [patent_doc_number] => 08190953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Method and system for selecting test vectors in statistical volume diagnosis using failed test data' [patent_app_type] => utility [patent_app_number] => 12/245174 [patent_app_country] => US [patent_app_date] => 2008-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6595 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/190/08190953.pdf [firstpage_image] =>[orig_patent_app_number] => 12245174 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/245174
Method and system for selecting test vectors in statistical volume diagnosis using failed test data Oct 2, 2008 Issued
Array ( [id] => 6388691 [patent_doc_number] => 20100083072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'Data interleaver' [patent_app_type] => utility [patent_app_number] => 12/286359 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20100083072.pdf [firstpage_image] =>[orig_patent_app_number] => 12286359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/286359
Data interleaver Sep 29, 2008 Issued
Array ( [id] => 8472764 [patent_doc_number] => 08301956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Methods and apparatus to improve communication in a relay channel' [patent_app_type] => utility [patent_app_number] => 12/286453 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12010 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12286453 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/286453
Methods and apparatus to improve communication in a relay channel Sep 29, 2008 Issued
Array ( [id] => 5427241 [patent_doc_number] => 20090086551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/285204 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 23818 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20090086551.pdf [firstpage_image] =>[orig_patent_app_number] => 12285204 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/285204
Semiconductor device Sep 29, 2008 Abandoned
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