Search

Elly Gerald Stoica

Examiner (ID: 13856, Phone: (571)272-9941 , Office: P/1647 )

Most Active Art Unit
1647
Art Unit(s)
1647, 1646
Total Applications
1381
Issued Applications
805
Pending Applications
99
Abandoned Applications
477

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8378337 [patent_doc_number] => 08261145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Apparatus and method for transmitting/receiving signal in communication system' [patent_app_type] => utility [patent_app_number] => 11/865189 [patent_app_country] => US [patent_app_date] => 2007-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4809 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11865189 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/865189
Apparatus and method for transmitting/receiving signal in communication system Sep 30, 2007 Issued
Array ( [id] => 4894620 [patent_doc_number] => 20080103719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'METHOD OF GENERATING TEST CLOCK SIGNAL AND TEST CLOCK SIGNAL GENERATOR FOR TESTING SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 11/862305 [patent_app_country] => US [patent_app_date] => 2007-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7497 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20080103719.pdf [firstpage_image] =>[orig_patent_app_number] => 11862305 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/862305
Method of generating test clock signal and test clock signal generator for testing semiconductor devices Sep 26, 2007 Issued
Array ( [id] => 5332785 [patent_doc_number] => 20090113262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'SYSTEM AND METHOD FOR CONDITIONING AND IDENTIFYING BAD BLOCKS IN INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 11/862894 [patent_app_country] => US [patent_app_date] => 2007-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3256 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20090113262.pdf [firstpage_image] =>[orig_patent_app_number] => 11862894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/862894
SYSTEM AND METHOD FOR CONDITIONING AND IDENTIFYING BAD BLOCKS IN INTEGRATED CIRCUITS Sep 26, 2007 Abandoned
Array ( [id] => 8208243 [patent_doc_number] => 08190967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Parity check matrix storing method, block LDPC coding method, and apparatus using parity check matrix storing method' [patent_app_type] => utility [patent_app_number] => 11/861884 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 8127 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/190/08190967.pdf [firstpage_image] =>[orig_patent_app_number] => 11861884 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/861884
Parity check matrix storing method, block LDPC coding method, and apparatus using parity check matrix storing method Sep 25, 2007 Issued
Array ( [id] => 4940508 [patent_doc_number] => 20080077827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Test method for semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/902914 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4528 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20080077827.pdf [firstpage_image] =>[orig_patent_app_number] => 11902914 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902914
Test method for semiconductor device Sep 25, 2007 Abandoned
Array ( [id] => 7972289 [patent_doc_number] => 07941723 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-10 [patent_title] => 'Clock generator and method for providing reliable clock signal using array of MEMS resonators' [patent_app_type] => utility [patent_app_number] => 11/861869 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/941/07941723.pdf [firstpage_image] =>[orig_patent_app_number] => 11861869 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/861869
Clock generator and method for providing reliable clock signal using array of MEMS resonators Sep 25, 2007 Issued
Array ( [id] => 8948 [patent_doc_number] => 07818642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Hierarchical test response compaction for a plurality of logic blocks' [patent_app_type] => utility [patent_app_number] => 11/903913 [patent_app_country] => US [patent_app_date] => 2007-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2645 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/818/07818642.pdf [firstpage_image] =>[orig_patent_app_number] => 11903913 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/903913
Hierarchical test response compaction for a plurality of logic blocks Sep 24, 2007 Issued
Array ( [id] => 4586960 [patent_doc_number] => 07849372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Write-once recording medium and defective area management method and apparatus for write-once recording medium' [patent_app_type] => utility [patent_app_number] => 11/902590 [patent_app_country] => US [patent_app_date] => 2007-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 8274 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/849/07849372.pdf [firstpage_image] =>[orig_patent_app_number] => 11902590 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902590
Write-once recording medium and defective area management method and apparatus for write-once recording medium Sep 23, 2007 Issued
Array ( [id] => 8170837 [patent_doc_number] => 08176379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Apparatus and method for processing received data in a broadband wireless communication system' [patent_app_type] => utility [patent_app_number] => 11/903090 [patent_app_country] => US [patent_app_date] => 2007-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16676 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/176/08176379.pdf [firstpage_image] =>[orig_patent_app_number] => 11903090 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/903090
Apparatus and method for processing received data in a broadband wireless communication system Sep 19, 2007 Issued
Array ( [id] => 4500094 [patent_doc_number] => 07904765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Test apparatus and test method' [patent_app_type] => utility [patent_app_number] => 11/857449 [patent_app_country] => US [patent_app_date] => 2007-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7508 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904765.pdf [firstpage_image] =>[orig_patent_app_number] => 11857449 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/857449
Test apparatus and test method Sep 18, 2007 Issued
Array ( [id] => 4826157 [patent_doc_number] => 20080229163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'TEST APPARATUS, TEST METHOD AND MACHINE READABLE MEDIUM STORING A PROGRAM THEREFOR' [patent_app_type] => utility [patent_app_number] => 11/857446 [patent_app_country] => US [patent_app_date] => 2007-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7469 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20080229163.pdf [firstpage_image] =>[orig_patent_app_number] => 11857446 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/857446
TEST APPARATUS, TEST METHOD AND MACHINE READABLE MEDIUM STORING A PROGRAM THEREFOR Sep 18, 2007 Abandoned
Array ( [id] => 4774207 [patent_doc_number] => 20080059869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'LOW COST, HIGH PERFORMANCE ERROR DETECTION AND CORRECTION' [patent_app_type] => utility [patent_app_number] => 11/848537 [patent_app_country] => US [patent_app_date] => 2007-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7500 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20080059869.pdf [firstpage_image] =>[orig_patent_app_number] => 11848537 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/848537
LOW COST, HIGH PERFORMANCE ERROR DETECTION AND CORRECTION Aug 30, 2007 Abandoned
Array ( [id] => 8540560 [patent_doc_number] => 08316287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-11-20 [patent_title] => 'Low-density parity check codes for holographic storage' [patent_app_type] => utility [patent_app_number] => 11/893936 [patent_app_country] => US [patent_app_date] => 2007-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11279 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11893936 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/893936
Low-density parity check codes for holographic storage Aug 16, 2007 Issued
Array ( [id] => 4479544 [patent_doc_number] => 07945833 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-17 [patent_title] => 'Method and apparatus for pipelined scan compression' [patent_app_type] => utility [patent_app_number] => 11/889710 [patent_app_country] => US [patent_app_date] => 2007-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6052 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/945/07945833.pdf [firstpage_image] =>[orig_patent_app_number] => 11889710 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/889710
Method and apparatus for pipelined scan compression Aug 14, 2007 Issued
Array ( [id] => 7780097 [patent_doc_number] => 08122334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Parity error detecting circuit and method' [patent_app_type] => utility [patent_app_number] => 11/829583 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3254 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122334.pdf [firstpage_image] =>[orig_patent_app_number] => 11829583 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/829583
Parity error detecting circuit and method Jul 26, 2007 Issued
Array ( [id] => 6480042 [patent_doc_number] => 20100192048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'TRANSMITTING APPARATUS AND COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/668346 [patent_app_country] => US [patent_app_date] => 2007-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 21716 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20100192048.pdf [firstpage_image] =>[orig_patent_app_number] => 12668346 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/668346
Transmitting apparatus and communication system Jul 9, 2007 Issued
Array ( [id] => 4671717 [patent_doc_number] => 20080046778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'MEMORY CONTROLLER AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/770320 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5528 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046778.pdf [firstpage_image] =>[orig_patent_app_number] => 11770320 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770320
MEMORY CONTROLLER AND SEMICONDUCTOR MEMORY DEVICE Jun 27, 2007 Abandoned
Array ( [id] => 5351550 [patent_doc_number] => 20090006911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'DATA REPLACEMENT PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 11/770518 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20090006911.pdf [firstpage_image] =>[orig_patent_app_number] => 11770518 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770518
DATA REPLACEMENT PROCESSING METHOD Jun 27, 2007 Abandoned
Array ( [id] => 7780042 [patent_doc_number] => 08122307 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-21 [patent_title] => 'One time programmable memory test structures and methods' [patent_app_type] => utility [patent_app_number] => 11/768974 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 5639 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122307.pdf [firstpage_image] =>[orig_patent_app_number] => 11768974 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768974
One time programmable memory test structures and methods Jun 26, 2007 Issued
Array ( [id] => 8741204 [patent_doc_number] => 08412990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Dynamically tracking data values in a configurable IC' [patent_app_type] => utility [patent_app_number] => 11/769683 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 24771 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11769683 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/769683
Dynamically tracking data values in a configurable IC Jun 26, 2007 Issued
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