Elly Gerald Stoica
Examiner (ID: 13856, Phone: (571)272-9941 , Office: P/1647 )
Most Active Art Unit | 1647 |
Art Unit(s) | 1647, 1646 |
Total Applications | 1381 |
Issued Applications | 805 |
Pending Applications | 99 |
Abandoned Applications | 477 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7623764
[patent_doc_number] => 06725413
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-20
[patent_title] => 'Data transfer control device and electronic equipment'
[patent_app_type] => B1
[patent_app_number] => 09/787129
[patent_app_country] => US
[patent_app_date] => 2001-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 28
[patent_no_of_words] => 10063
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/725/06725413.pdf
[firstpage_image] =>[orig_patent_app_number] => 09787129
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/787129 | Data transfer control device and electronic equipment | Mar 13, 2001 | Issued |
Array
(
[id] => 6143692
[patent_doc_number] => 20020002693
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-03
[patent_title] => 'Error correction structures and methods'
[patent_app_type] => new
[patent_app_number] => 09/788805
[patent_app_country] => US
[patent_app_date] => 2001-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3752
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0002/20020002693.pdf
[firstpage_image] =>[orig_patent_app_number] => 09788805
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788805 | Error correction structures and methods | Feb 19, 2001 | Issued |
Array
(
[id] => 1162003
[patent_doc_number] => 06775795
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-10
[patent_title] => 'Method and apparatus for testing an SDRAM memory used as the main memory in a personal computer'
[patent_app_type] => B2
[patent_app_number] => 09/789991
[patent_app_country] => US
[patent_app_date] => 2001-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3579
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/775/06775795.pdf
[firstpage_image] =>[orig_patent_app_number] => 09789991
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/789991 | Method and apparatus for testing an SDRAM memory used as the main memory in a personal computer | Feb 19, 2001 | Issued |
Array
(
[id] => 6181639
[patent_doc_number] => 20020157058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'System and method for feedback-based unequal error protection coding'
[patent_app_type] => new
[patent_app_number] => 09/785489
[patent_app_country] => US
[patent_app_date] => 2001-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 10719
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20020157058.pdf
[firstpage_image] =>[orig_patent_app_number] => 09785489
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/785489 | System and method for feedback-based unequal error protection coding | Feb 19, 2001 | Abandoned |
Array
(
[id] => 6988821
[patent_doc_number] => 20010037483
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-01
[patent_title] => 'Error correction structures and methods'
[patent_app_type] => new
[patent_app_number] => 09/788850
[patent_app_country] => US
[patent_app_date] => 2001-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2851
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0037/20010037483.pdf
[firstpage_image] =>[orig_patent_app_number] => 09788850
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788850 | Error correction structures and methods | Feb 19, 2001 | Issued |
Array
(
[id] => 5910674
[patent_doc_number] => 20020144209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'System for enhanced error correction in trellis decoding'
[patent_app_type] => new
[patent_app_number] => 09/785192
[patent_app_country] => US
[patent_app_date] => 2001-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 10933
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0144/20020144209.pdf
[firstpage_image] =>[orig_patent_app_number] => 09785192
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/785192 | System for enhanced error correction in trellis decoding | Feb 19, 2001 | Abandoned |
Array
(
[id] => 1001823
[patent_doc_number] => 06912683
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-28
[patent_title] => 'Method, apparatus, and product for use in generating CRC and other remainder based codes'
[patent_app_type] => utility
[patent_app_number] => 09/788859
[patent_app_country] => US
[patent_app_date] => 2001-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 34
[patent_no_of_words] => 14952
[patent_no_of_claims] => 84
[patent_no_of_ind_claims] => 19
[patent_words_short_claim] => 20
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/912/06912683.pdf
[firstpage_image] =>[orig_patent_app_number] => 09788859
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788859 | Method, apparatus, and product for use in generating CRC and other remainder based codes | Feb 19, 2001 | Issued |
Array
(
[id] => 1201157
[patent_doc_number] => 06728929
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-27
[patent_title] => 'System and method to insert a TCP checksum in a protocol neutral manner'
[patent_app_type] => B1
[patent_app_number] => 09/788014
[patent_app_country] => US
[patent_app_date] => 2001-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2382
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/728/06728929.pdf
[firstpage_image] =>[orig_patent_app_number] => 09788014
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788014 | System and method to insert a TCP checksum in a protocol neutral manner | Feb 15, 2001 | Issued |
Array
(
[id] => 1186012
[patent_doc_number] => 06745356
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-01
[patent_title] => 'Scannable state element architecture for digital circuits'
[patent_app_type] => B1
[patent_app_number] => 09/784863
[patent_app_country] => US
[patent_app_date] => 2001-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3553
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/745/06745356.pdf
[firstpage_image] =>[orig_patent_app_number] => 09784863
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/784863 | Scannable state element architecture for digital circuits | Feb 14, 2001 | Issued |
Array
(
[id] => 7625674
[patent_doc_number] => 06769093
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-07-27
[patent_title] => 'Synchronization of a communications system'
[patent_app_type] => B1
[patent_app_number] => 09/788171
[patent_app_country] => US
[patent_app_date] => 2001-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7850
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 6
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/769/06769093.pdf
[firstpage_image] =>[orig_patent_app_number] => 09788171
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788171 | Synchronization of a communications system | Feb 13, 2001 | Issued |
Array
(
[id] => 1207017
[patent_doc_number] => 06721915
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-13
[patent_title] => 'Memory testing method'
[patent_app_type] => B2
[patent_app_number] => 09/750098
[patent_app_country] => US
[patent_app_date] => 2000-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 32
[patent_no_of_words] => 5685
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/721/06721915.pdf
[firstpage_image] =>[orig_patent_app_number] => 09750098
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/750098 | Memory testing method | Dec 28, 2000 | Issued |
Array
(
[id] => 1192663
[patent_doc_number] => 06735723
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-11
[patent_title] => 'Apparatus and method for processing interleaving/deinterleaving with address generator and channel encoding system using the same'
[patent_app_type] => B2
[patent_app_number] => 09/750186
[patent_app_country] => US
[patent_app_date] => 2000-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 11836
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/735/06735723.pdf
[firstpage_image] =>[orig_patent_app_number] => 09750186
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/750186 | Apparatus and method for processing interleaving/deinterleaving with address generator and channel encoding system using the same | Dec 28, 2000 | Issued |
Array
(
[id] => 6649311
[patent_doc_number] => 20020087936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-04
[patent_title] => 'Method and apparatus for encoding a bus to minimize simultaneous switching outputs effect'
[patent_app_type] => new
[patent_app_number] => 09/750297
[patent_app_country] => US
[patent_app_date] => 2000-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3970
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 16
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20020087936.pdf
[firstpage_image] =>[orig_patent_app_number] => 09750297
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/750297 | Method and apparatus for encoding a bus to minimize simultaneous switching outputs effect | Dec 28, 2000 | Issued |
Array
(
[id] => 6948352
[patent_doc_number] => 20010021989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-13
[patent_title] => 'Parity checking device and method in data communication system'
[patent_app_type] => new
[patent_app_number] => 09/751509
[patent_app_country] => US
[patent_app_date] => 2000-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3729
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0021/20010021989.pdf
[firstpage_image] =>[orig_patent_app_number] => 09751509
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/751509 | Parity checking device and method in data communication system | Dec 28, 2000 | Issued |
Array
(
[id] => 1186029
[patent_doc_number] => 06745365
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-01
[patent_title] => 'Coder with error correction, decoder with error correction and data transmission apparatus using the coder and decoder'
[patent_app_type] => B2
[patent_app_number] => 09/749415
[patent_app_country] => US
[patent_app_date] => 2000-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 30
[patent_no_of_words] => 15629
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/745/06745365.pdf
[firstpage_image] =>[orig_patent_app_number] => 09749415
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/749415 | Coder with error correction, decoder with error correction and data transmission apparatus using the coder and decoder | Dec 27, 2000 | Issued |
Array
(
[id] => 6649290
[patent_doc_number] => 20020087932
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-04
[patent_title] => 'Method of determining non-accessible device I/O pin speed using on chip LFSR and MISR as data source and results analyzer respectively'
[patent_app_type] => new
[patent_app_number] => 09/750199
[patent_app_country] => US
[patent_app_date] => 2000-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2032
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20020087932.pdf
[firstpage_image] =>[orig_patent_app_number] => 09750199
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/750199 | Method of determining non-accessible device I/O pin speed using on chip LFSR and MISR as data source and results analyzer respectively | Dec 27, 2000 | Issued |
Array
(
[id] => 5926853
[patent_doc_number] => 20020116681
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-22
[patent_title] => 'Decoder, system and method for decoding trubo block codes'
[patent_app_type] => new
[patent_app_number] => 09/748779
[patent_app_country] => US
[patent_app_date] => 2000-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6964
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0116/20020116681.pdf
[firstpage_image] =>[orig_patent_app_number] => 09748779
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/748779 | Decoder, system and method for decoding trubo block codes | Dec 26, 2000 | Abandoned |
Array
(
[id] => 1236589
[patent_doc_number] => 06694471
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-17
[patent_title] => 'System and method for periodic retransmission of messages'
[patent_app_type] => B1
[patent_app_number] => 09/751154
[patent_app_country] => US
[patent_app_date] => 2000-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 5006
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/694/06694471.pdf
[firstpage_image] =>[orig_patent_app_number] => 09751154
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/751154 | System and method for periodic retransmission of messages | Dec 26, 2000 | Issued |
Array
(
[id] => 1197141
[patent_doc_number] => 06732306
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-04
[patent_title] => 'Special programming mode with hashing'
[patent_app_type] => B2
[patent_app_number] => 09/749133
[patent_app_country] => US
[patent_app_date] => 2000-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 11117
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/732/06732306.pdf
[firstpage_image] =>[orig_patent_app_number] => 09749133
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/749133 | Special programming mode with hashing | Dec 25, 2000 | Issued |
Array
(
[id] => 7608026
[patent_doc_number] => 07000174
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-14
[patent_title] => 'Hybrid automatic repeat request system and method'
[patent_app_type] => utility
[patent_app_number] => 10/168516
[patent_app_country] => US
[patent_app_date] => 2000-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 27
[patent_no_of_words] => 18947
[patent_no_of_claims] => 59
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/000/07000174.pdf
[firstpage_image] =>[orig_patent_app_number] => 10168516
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/168516 | Hybrid automatic repeat request system and method | Dec 18, 2000 | Issued |