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Elly Gerald Stoica

Examiner (ID: 13856, Phone: (571)272-9941 , Office: P/1647 )

Most Active Art Unit
1647
Art Unit(s)
1647, 1646
Total Applications
1381
Issued Applications
805
Pending Applications
99
Abandoned Applications
477

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1280030 [patent_doc_number] => 06654928 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Hybrid dimensional, spherical space-time coding and decoding apparatus, and associated method, for a communication system' [patent_app_type] => B1 [patent_app_number] => 09/619824 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4758 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/654/06654928.pdf [firstpage_image] =>[orig_patent_app_number] => 09619824 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/619824
Hybrid dimensional, spherical space-time coding and decoding apparatus, and associated method, for a communication system Jul 19, 2000 Issued
Array ( [id] => 1250323 [patent_doc_number] => 06675347 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method and apparatus for combined puncturing and repeating of code symbols in a communications system' [patent_app_type] => B1 [patent_app_number] => 09/618952 [patent_app_country] => US [patent_app_date] => 2000-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7970 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675347.pdf [firstpage_image] =>[orig_patent_app_number] => 09618952 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/618952
Method and apparatus for combined puncturing and repeating of code symbols in a communications system Jul 18, 2000 Issued
Array ( [id] => 1225930 [patent_doc_number] => 06704892 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Automated clock alignment for testing processors in a bypass mode' [patent_app_type] => B1 [patent_app_number] => 09/583268 [patent_app_country] => US [patent_app_date] => 2000-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 41 [patent_no_of_words] => 5237 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704892.pdf [firstpage_image] =>[orig_patent_app_number] => 09583268 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/583268
Automated clock alignment for testing processors in a bypass mode May 30, 2000 Issued
Array ( [id] => 1334142 [patent_doc_number] => 06600621 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Techniques for multitrack positioning and controlling error growth in self-servowriting systems' [patent_app_type] => B1 [patent_app_number] => 09/583832 [patent_app_country] => US [patent_app_date] => 2000-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4077 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600621.pdf [firstpage_image] =>[orig_patent_app_number] => 09583832 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/583832
Techniques for multitrack positioning and controlling error growth in self-servowriting systems May 30, 2000 Issued
Array ( [id] => 1221858 [patent_doc_number] => 06708302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Semiconductor module' [patent_app_type] => B1 [patent_app_number] => 09/570461 [patent_app_country] => US [patent_app_date] => 2000-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4465 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/708/06708302.pdf [firstpage_image] =>[orig_patent_app_number] => 09570461 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/570461
Semiconductor module May 11, 2000 Issued
Array ( [id] => 792814 [patent_doc_number] => 06986081 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-01-10 [patent_title] => 'Block interleaving apparatus, block deinterleaving apparatus, block interleaving method and block deinterleaving method' [patent_app_type] => utility [patent_app_number] => 09/936510 [patent_app_country] => US [patent_app_date] => 2000-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 51 [patent_no_of_words] => 24934 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/986/06986081.pdf [firstpage_image] =>[orig_patent_app_number] => 09936510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/936510
Block interleaving apparatus, block deinterleaving apparatus, block interleaving method and block deinterleaving method Mar 13, 2000 Issued
Array ( [id] => 856439 [patent_doc_number] => 07380192 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-05-27 [patent_title] => 'Logic circuit protected against transient disturbances' [patent_app_type] => utility [patent_app_number] => 09/936032 [patent_app_country] => US [patent_app_date] => 2000-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 7166 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/380/07380192.pdf [firstpage_image] =>[orig_patent_app_number] => 09936032 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/936032
Logic circuit protected against transient disturbances Mar 7, 2000 Issued
Array ( [id] => 1027753 [patent_doc_number] => 06886122 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-26 [patent_title] => 'Method for testing integrated circuits with memory element access' [patent_app_type] => utility [patent_app_number] => 09/936487 [patent_app_country] => US [patent_app_date] => 2000-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4393 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/886/06886122.pdf [firstpage_image] =>[orig_patent_app_number] => 09936487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/936487
Method for testing integrated circuits with memory element access Mar 6, 2000 Issued
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