
Elmira Mehrmanesh
Examiner (ID: 3799)
| Most Active Art Unit | 2113 |
| Art Unit(s) | 2113 |
| Total Applications | 857 |
| Issued Applications | 677 |
| Pending Applications | 53 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8886595
[patent_doc_number] => 20130159779
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'FRAMEWORK FOR THE REMOTE DEBUGGING OF WEB APPLICATIONS'
[patent_app_type] => utility
[patent_app_number] => 13/329335
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3830
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329335
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/329335 | FRAMEWORK FOR THE REMOTE DEBUGGING OF WEB APPLICATIONS | Dec 18, 2011 | Abandoned |
Array
(
[id] => 10003158
[patent_doc_number] => 09047251
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Systems and methods for implementing connection mirroring in a multi-core system'
[patent_app_type] => utility
[patent_app_number] => 13/330164
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 23
[patent_no_of_words] => 53468
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330164
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/330164 | Systems and methods for implementing connection mirroring in a multi-core system | Dec 18, 2011 | Issued |
Array
(
[id] => 8254924
[patent_doc_number] => 20120159253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-21
[patent_title] => 'Hardware security module and processing method in such a module'
[patent_app_type] => utility
[patent_app_number] => 13/328243
[patent_app_country] => US
[patent_app_date] => 2011-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8787
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0159/20120159253.pdf
[firstpage_image] =>[orig_patent_app_number] => 13328243
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/328243 | Hardware security module and processing method in such a module with augmented communication features | Dec 15, 2011 | Issued |
Array
(
[id] => 8886580
[patent_doc_number] => 20130159764
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'PCI Express Error Handling and Recovery Action Controls'
[patent_app_type] => utility
[patent_app_number] => 13/326457
[patent_app_country] => US
[patent_app_date] => 2011-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2406
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326457
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/326457 | PCI express error handling and recovery action controls | Dec 14, 2011 | Issued |
Array
(
[id] => 10867231
[patent_doc_number] => 08892956
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-18
[patent_title] => 'Electronic device and method for managing test results'
[patent_app_type] => utility
[patent_app_number] => 13/313001
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2661
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13313001
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/313001 | Electronic device and method for managing test results | Dec 6, 2011 | Issued |
Array
(
[id] => 9083268
[patent_doc_number] => 20130268798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-10
[patent_title] => 'Microprocessor System Having Fault-Tolerant Architecture'
[patent_app_type] => utility
[patent_app_number] => 13/988176
[patent_app_country] => US
[patent_app_date] => 2011-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 7851
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13988176
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/988176 | Microprocessor System Having Fault-Tolerant Architecture | Nov 17, 2011 | Abandoned |
Array
(
[id] => 10847764
[patent_doc_number] => 08874965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Controlling program code execution shared among a plurality of processors'
[patent_app_type] => utility
[patent_app_number] => 13/319882
[patent_app_country] => US
[patent_app_date] => 2011-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 13574
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 309
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13319882
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/319882 | Controlling program code execution shared among a plurality of processors | Oct 25, 2011 | Issued |
Array
(
[id] => 8699080
[patent_doc_number] => 20130061089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-07
[patent_title] => 'EFFICIENT APPLICATION-AWARE DISASTER RECOVERY'
[patent_app_type] => utility
[patent_app_number] => 13/224794
[patent_app_country] => US
[patent_app_date] => 2011-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4332
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13224794
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/224794 | Efficient application-aware disaster recovery | Sep 1, 2011 | Issued |
Array
(
[id] => 9358625
[patent_doc_number] => 08677179
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-18
[patent_title] => 'Information processing apparatus for performing error process when controllers in synchronization operation detect error simultaneously'
[patent_app_type] => utility
[patent_app_number] => 13/225146
[patent_app_country] => US
[patent_app_date] => 2011-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 34
[patent_no_of_words] => 9027
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13225146
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/225146 | Information processing apparatus for performing error process when controllers in synchronization operation detect error simultaneously | Sep 1, 2011 | Issued |
Array
(
[id] => 9967901
[patent_doc_number] => 09015536
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-04-21
[patent_title] => 'Integration based anomaly detection service'
[patent_app_type] => utility
[patent_app_number] => 13/222850
[patent_app_country] => US
[patent_app_date] => 2011-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9626
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13222850
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/222850 | Integration based anomaly detection service | Aug 30, 2011 | Issued |
Array
(
[id] => 8686724
[patent_doc_number] => 20130055008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'DOWNLOADING A DISK IMAGE FROM A SERVER WITH A REDUCED CORRUPTION WINDOW'
[patent_app_type] => utility
[patent_app_number] => 13/217390
[patent_app_country] => US
[patent_app_date] => 2011-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4801
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217390
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/217390 | Downloading a disk image from a server with a reduced corruption window | Aug 24, 2011 | Issued |
Array
(
[id] => 8686725
[patent_doc_number] => 20130055009
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'System and Method for Providing Reliable Storage'
[patent_app_type] => utility
[patent_app_number] => 13/215345
[patent_app_country] => US
[patent_app_date] => 2011-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 10052
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13215345
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/215345 | System and method for providing reliable storage | Aug 22, 2011 | Issued |
Array
(
[id] => 8661320
[patent_doc_number] => 20130042149
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-14
[patent_title] => 'ANALYZING A PROCESS OF SOFTWARE DEFECTS HANDLING USING PERCENTILE-BASED METRICS'
[patent_app_type] => utility
[patent_app_number] => 13/205651
[patent_app_country] => US
[patent_app_date] => 2011-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4479
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13205651
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/205651 | Analyzing a process of software defects handling using percentile-based metrics | Aug 8, 2011 | Issued |
Array
(
[id] => 7493158
[patent_doc_number] => 20110239059
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-29
[patent_title] => 'DISPLAY SCREEN CONTROL DEVICE, DISPLAY SCREEN CONTROL METHOD, AND COMPUTER READABLE MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 13/051166
[patent_app_country] => US
[patent_app_date] => 2011-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 14778
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0239/20110239059.pdf
[firstpage_image] =>[orig_patent_app_number] => 13051166
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/051166 | Display screen control device with error alert, display screen control method, and computer readable medium | Mar 17, 2011 | Issued |
Array
(
[id] => 8395644
[patent_doc_number] => 20120233496
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-13
[patent_title] => 'FAULT TOLERANCE IN A PARALLEL DATABASE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/046414
[patent_app_country] => US
[patent_app_date] => 2011-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4827
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13046414
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/046414 | Fault tolerance in a parallel database system | Mar 10, 2011 | Issued |
Array
(
[id] => 6020502
[patent_doc_number] => 20110225457
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-15
[patent_title] => 'System for Testing a Multitasking Computation Architecture Based on Communication Data between Processors and Corresponding Test Method'
[patent_app_type] => utility
[patent_app_number] => 13/036836
[patent_app_country] => US
[patent_app_date] => 2011-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2852
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0225/20110225457.pdf
[firstpage_image] =>[orig_patent_app_number] => 13036836
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/036836 | System for Testing a Multitasking Computation Architecture Based on Communication Data between Processors and Corresponding Test Method | Feb 27, 2011 | Abandoned |
Array
(
[id] => 8372496
[patent_doc_number] => 20120221891
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-30
[patent_title] => 'PROGRAMMABLE CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/395832
[patent_app_country] => US
[patent_app_date] => 2011-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4082
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13395832
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/395832 | PROGRAMMABLE CONTROLLER | Feb 13, 2011 | Abandoned |
Array
(
[id] => 7746860
[patent_doc_number] => 20120023320
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-26
[patent_title] => 'BIOS CHIP RECOVERY SYSTEM AND COMPUTER THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/982902
[patent_app_country] => US
[patent_app_date] => 2010-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1270
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0023/20120023320.pdf
[firstpage_image] =>[orig_patent_app_number] => 12982902
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/982902 | BIOS CHIP RECOVERY SYSTEM AND COMPUTER THEREOF | Dec 30, 2010 | Abandoned |
Array
(
[id] => 10847770
[patent_doc_number] => 08874971
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-10-28
[patent_title] => 'Detecting and reporting problems in a distributed resource computing system'
[patent_app_type] => utility
[patent_app_number] => 12/982225
[patent_app_country] => US
[patent_app_date] => 2010-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 7252
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982225
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/982225 | Detecting and reporting problems in a distributed resource computing system | Dec 29, 2010 | Issued |
Array
(
[id] => 8280080
[patent_doc_number] => 20120173952
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'PARALLEL CRC COMPUTATION WITH DATA ENABLES'
[patent_app_type] => utility
[patent_app_number] => 12/981160
[patent_app_country] => US
[patent_app_date] => 2010-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8886
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12981160
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/981160 | PARALLEL CRC COMPUTATION WITH DATA ENABLES | Dec 28, 2010 | Abandoned |