Search

Elmira Mehrmanesh

Examiner (ID: 3799)

Most Active Art Unit
2113
Art Unit(s)
2113
Total Applications
857
Issued Applications
677
Pending Applications
53
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7266769 [patent_doc_number] => 20040243882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'System and method for fault injection and monitoring' [patent_app_type] => new [patent_app_number] => 10/445700 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3531 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20040243882.pdf [firstpage_image] =>[orig_patent_app_number] => 10445700 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445700
System and method for fault injection and monitoring May 26, 2003 Abandoned
Array ( [id] => 7266770 [patent_doc_number] => 20040243883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Method and system for remote software debugging' [patent_app_type] => new [patent_app_number] => 10/446044 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5177 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20040243883.pdf [firstpage_image] =>[orig_patent_app_number] => 10446044 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/446044
Method and system for remote software debugging May 26, 2003 Issued
Array ( [id] => 7333517 [patent_doc_number] => 20040255186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Methods and apparatus for failure detection and recovery in redundant systems' [patent_app_type] => new [patent_app_number] => 10/445541 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6263 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255186.pdf [firstpage_image] =>[orig_patent_app_number] => 10445541 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445541
Methods and apparatus for failure detection and recovery in redundant systems May 26, 2003 Abandoned
Array ( [id] => 6702933 [patent_doc_number] => 20030225813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Programmable controller with CPU and communication units and method of controlling same' [patent_app_type] => new [patent_app_number] => 10/444922 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6012 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20030225813.pdf [firstpage_image] =>[orig_patent_app_number] => 10444922 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/444922
Programmable controller with CPU and communication units and method of controlling same May 22, 2003 Issued
Array ( [id] => 388726 [patent_doc_number] => 07305585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Asynchronous and autonomous data replication' [patent_app_type] => utility [patent_app_number] => 10/445145 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3820 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/305/07305585.pdf [firstpage_image] =>[orig_patent_app_number] => 10445145 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445145
Asynchronous and autonomous data replication May 22, 2003 Issued
Array ( [id] => 392988 [patent_doc_number] => 07302616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Method and apparatus for performing bus tracing with scalable bandwidth in a data processing system having a distributed memory' [patent_app_type] => utility [patent_app_number] => 10/406649 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4438 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/302/07302616.pdf [firstpage_image] =>[orig_patent_app_number] => 10406649 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/406649
Method and apparatus for performing bus tracing with scalable bandwidth in a data processing system having a distributed memory Apr 2, 2003 Issued
Array ( [id] => 7316246 [patent_doc_number] => 20040034816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-19 [patent_title] => 'Computer failure recovery and notification system' [patent_app_type] => new [patent_app_number] => 10/405494 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3033 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20040034816.pdf [firstpage_image] =>[orig_patent_app_number] => 10405494 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405494
Computer failure recovery and notification system Apr 2, 2003 Abandoned
Array ( [id] => 504148 [patent_doc_number] => 07213169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'Method and apparatus for performing imprecise bus tracing in a data processing system having a distributed memory' [patent_app_type] => utility [patent_app_number] => 10/406650 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4506 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/213/07213169.pdf [firstpage_image] =>[orig_patent_app_number] => 10406650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/406650
Method and apparatus for performing imprecise bus tracing in a data processing system having a distributed memory Apr 2, 2003 Issued
Array ( [id] => 7472808 [patent_doc_number] => 20040199807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Generating a test environment for validating a network design' [patent_app_type] => new [patent_app_number] => 10/405768 [patent_app_country] => US [patent_app_date] => 2003-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5252 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20040199807.pdf [firstpage_image] =>[orig_patent_app_number] => 10405768 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405768
Generating a test environment for validating a network design Mar 31, 2003 Issued
Array ( [id] => 368371 [patent_doc_number] => 07480831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-20 [patent_title] => 'Method and apparatus for recovering from a failed I/O controller in an information handling system' [patent_app_type] => utility [patent_app_number] => 10/349584 [patent_app_country] => US [patent_app_date] => 2003-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3342 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/480/07480831.pdf [firstpage_image] =>[orig_patent_app_number] => 10349584 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/349584
Method and apparatus for recovering from a failed I/O controller in an information handling system Jan 22, 2003 Issued
Array ( [id] => 513551 [patent_doc_number] => 07206968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'System and method for generating an XML-based fault model' [patent_app_type] => utility [patent_app_number] => 10/349395 [patent_app_country] => US [patent_app_date] => 2003-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2574 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206968.pdf [firstpage_image] =>[orig_patent_app_number] => 10349395 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/349395
System and method for generating an XML-based fault model Jan 21, 2003 Issued
Array ( [id] => 6661142 [patent_doc_number] => 20030135786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'System and method for supporting a fault cause analysis' [patent_app_type] => new [patent_app_number] => 10/349394 [patent_app_country] => US [patent_app_date] => 2003-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3098 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20030135786.pdf [firstpage_image] =>[orig_patent_app_number] => 10349394 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/349394
System and method for supporting a fault cause analysis Jan 21, 2003 Issued
Array ( [id] => 447452 [patent_doc_number] => 07257742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Disk reproducing apparatus' [patent_app_type] => utility [patent_app_number] => 10/318157 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5689 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 650 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/257/07257742.pdf [firstpage_image] =>[orig_patent_app_number] => 10318157 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318157
Disk reproducing apparatus Dec 12, 2002 Issued
Array ( [id] => 4486953 [patent_doc_number] => 07870431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Transaction tracer' [patent_app_type] => utility [patent_app_number] => 10/318272 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 8309 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/870/07870431.pdf [firstpage_image] =>[orig_patent_app_number] => 10318272 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318272
Transaction tracer Dec 11, 2002 Issued
Array ( [id] => 7309398 [patent_doc_number] => 20040117689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Method and system for diagnostic approach for fault isolation at device level on peripheral component interconnect (PCI) bus' [patent_app_type] => new [patent_app_number] => 10/317151 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7802 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20040117689.pdf [firstpage_image] =>[orig_patent_app_number] => 10317151 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317151
Method and system for diagnostic approach for fault isolation at device level on peripheral component interconnect (PCI) bus Dec 11, 2002 Abandoned
Array ( [id] => 6707687 [patent_doc_number] => 20030154421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Information processing device, power source control device, and method, program, and recording medium for controlling information processing device' [patent_app_type] => new [patent_app_number] => 10/317323 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9514 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20030154421.pdf [firstpage_image] =>[orig_patent_app_number] => 10317323 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317323
Information processing device, power source control device, and method, program, and recording medium for controlling information processing device Dec 11, 2002 Abandoned
Array ( [id] => 560367 [patent_doc_number] => 07178067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Secure EEPROM memory comprising an error correction circuit' [patent_app_type] => utility [patent_app_number] => 10/317005 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5215 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/178/07178067.pdf [firstpage_image] =>[orig_patent_app_number] => 10317005 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317005
Secure EEPROM memory comprising an error correction circuit Dec 10, 2002 Issued
Array ( [id] => 713418 [patent_doc_number] => 07062685 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-13 [patent_title] => 'Techniques for providing early failure warning of a programmable circuit' [patent_app_type] => utility [patent_app_number] => 10/317436 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3089 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/062/07062685.pdf [firstpage_image] =>[orig_patent_app_number] => 10317436 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317436
Techniques for providing early failure warning of a programmable circuit Dec 10, 2002 Issued
Array ( [id] => 8678716 [patent_doc_number] => 08386852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Automated recording and replaying of software regression tests' [patent_app_type] => utility [patent_app_number] => 10/287794 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10287794 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/287794
Automated recording and replaying of software regression tests Nov 4, 2002 Issued
Array ( [id] => 7241429 [patent_doc_number] => 20050257087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Test circuit topology reconfiguration and utilization method' [patent_app_type] => utility [patent_app_number] => 10/497271 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5104 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20050257087.pdf [firstpage_image] =>[orig_patent_app_number] => 10497271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/497271
Test circuit topology reconfiguration and utilization method Nov 4, 2002 Abandoned
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