Search

Elvis O. Price

Examiner (ID: 16750, Phone: (571)272-0644 , Office: P/1671 )

Most Active Art Unit
1621
Art Unit(s)
1621, 1671
Total Applications
1230
Issued Applications
1010
Pending Applications
52
Abandoned Applications
169

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15598489 [patent_doc_number] => 20200075779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => INTEGRATION OF GRAPHENE AND BORON NITRIDE HETERO-STRUCTURE DEVICE [patent_app_type] => utility [patent_app_number] => 16/661758 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661758 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661758
Integration of graphene and boron nitride hetero-structure device Oct 22, 2019 Issued
Array ( [id] => 15970033 [patent_doc_number] => 20200168768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => Method of Manufacturing Gallium Nitride Quantum Dots [patent_app_type] => utility [patent_app_number] => 16/661938 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661938 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661938
Method of manufacturing gallium nitride quantum dots Oct 22, 2019 Issued
Array ( [id] => 16098323 [patent_doc_number] => 20200203148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/661234 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661234
Method for fabricating semiconductor device Oct 22, 2019 Issued
Array ( [id] => 16617211 [patent_doc_number] => 20210035864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => Electronic Device Including a Polymer Support Layer and a Process of Forming the Same [patent_app_type] => utility [patent_app_number] => 16/661776 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661776 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661776
Process of forming an electronic device including a polymer support layer Oct 22, 2019 Issued
Array ( [id] => 16781943 [patent_doc_number] => 20210119022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => METHODS FOR FORMING ULTRA-SHALLOW JUNCTIONS HAVING IMPROVED ACTIVATION [patent_app_type] => utility [patent_app_number] => 16/660089 [patent_app_country] => US [patent_app_date] => 2019-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16660089 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/660089
METHODS FOR FORMING ULTRA-SHALLOW JUNCTIONS HAVING IMPROVED ACTIVATION Oct 21, 2019 Abandoned
Array ( [id] => 16781602 [patent_doc_number] => 20210118681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => ENHANCED SUBSTRATE AMORPHIZATION USING INTERMITTENT ION EXPOSURE [patent_app_type] => utility [patent_app_number] => 16/660417 [patent_app_country] => US [patent_app_date] => 2019-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16660417 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/660417
Enhanced substrate amorphization using intermittent ion exposure Oct 21, 2019 Issued
Array ( [id] => 17470189 [patent_doc_number] => 11276672 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-15 [patent_title] => Bonding dummy electrodes of light emitting diode chip to substrate [patent_app_type] => utility [patent_app_number] => 16/596527 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5067 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16596527 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/596527
Bonding dummy electrodes of light emitting diode chip to substrate Oct 7, 2019 Issued
Array ( [id] => 15370221 [patent_doc_number] => 20200020875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/580432 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20002 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580432 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580432
Light-emitting device and method for manufacturing the same Sep 23, 2019 Issued
Array ( [id] => 15351983 [patent_doc_number] => 20200013883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => Method Of Making Split Gate Non-volatile Flash Memory Cell [patent_app_type] => utility [patent_app_number] => 16/576389 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/576389
Method of making split gate non-volatile flash memory cell Sep 18, 2019 Issued
Array ( [id] => 15370049 [patent_doc_number] => 20200020789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => Method Of Making Split Gate Non-volatile Flash Memory Cell [patent_app_type] => utility [patent_app_number] => 16/576370 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/576370
Method of making split gate non-volatile flash memory cell Sep 18, 2019 Issued
Array ( [id] => 15351981 [patent_doc_number] => 20200013882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => Method Of Making Split Gate Non-volatile Flash Memory Cell [patent_app_type] => utility [patent_app_number] => 16/576348 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 500 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576348 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/576348
Method of making split gate non-volatile flash memory cell Sep 18, 2019 Issued
Array ( [id] => 16715723 [patent_doc_number] => 20210082870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SHIFT CONTROL METHOD IN MANUFACTURE OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/572628 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572628 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572628
Shift control method in manufacture of semiconductor device Sep 16, 2019 Issued
Array ( [id] => 18051811 [patent_doc_number] => 11525185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Vacuum systems in semiconductor fabrication facilities [patent_app_type] => utility [patent_app_number] => 16/573235 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 10377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573235 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573235
Vacuum systems in semiconductor fabrication facilities Sep 16, 2019 Issued
Array ( [id] => 16715559 [patent_doc_number] => 20210082706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => Methods for Doping High-K Metal Gates for Tuning Threshold Voltages [patent_app_type] => utility [patent_app_number] => 16/572820 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572820 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572820
Methods for doping high-k metal gates for tuning threshold voltages Sep 16, 2019 Issued
Array ( [id] => 15687929 [patent_doc_number] => 20200098628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SYSTEMS AND METHODS FOR IMPROVING WITHIN DIE CO-PLANARITY UNIFORMITY [patent_app_type] => utility [patent_app_number] => 16/572920 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572920 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572920
Systems and methods for improving within die co-planarity uniformity Sep 16, 2019 Issued
Array ( [id] => 15657689 [patent_doc_number] => 20200091375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => PHOTORESIST CONTACT PATTERNING OF QUANTUM DOT FILMS [patent_app_type] => utility [patent_app_number] => 16/572861 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572861
Photoresist contact patterning of quantum dot films Sep 16, 2019 Issued
Array ( [id] => 16944090 [patent_doc_number] => 11056341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Optical semiconductor element and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/571934 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 6723 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571934 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571934
Optical semiconductor element and method of manufacturing the same Sep 15, 2019 Issued
Array ( [id] => 16819912 [patent_doc_number] => 11004750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Middle of the line contact formation [patent_app_type] => utility [patent_app_number] => 16/572005 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 8374 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572005 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572005
Middle of the line contact formation Sep 15, 2019 Issued
Array ( [id] => 16560363 [patent_doc_number] => 20210005512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR UNIT [patent_app_type] => utility [patent_app_number] => 16/571359 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571359 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571359
Method of manufacturing a semiconductor unit Sep 15, 2019 Issued
Array ( [id] => 15332043 [patent_doc_number] => 20200006351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => MULTI-COMPONENT CONDUCTIVE STRUCTURES FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/564896 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4554 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564896 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564896
Multi-component conductive structures for semiconductor devices Sep 8, 2019 Issued
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