Search

Emerson C. Puente

Examiner (ID: 19087)

Most Active Art Unit
2113
Art Unit(s)
2187, 2113, 2196, 2184
Total Applications
379
Issued Applications
265
Pending Applications
30
Abandoned Applications
86

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 28329 [patent_doc_number] => 07797565 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-14 [patent_title] => 'System and method for maintaining communication protocol connections during failover' [patent_app_type] => utility [patent_app_number] => 11/397059 [patent_app_country] => US [patent_app_date] => 2006-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5548 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/797/07797565.pdf [firstpage_image] =>[orig_patent_app_number] => 11397059 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/397059
System and method for maintaining communication protocol connections during failover Apr 3, 2006 Issued
Array ( [id] => 5755767 [patent_doc_number] => 20060224916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Data storage device, reconstruction controlling device, reconstruction controlling method, and storage medium' [patent_app_type] => utility [patent_app_number] => 11/396871 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4212 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20060224916.pdf [firstpage_image] =>[orig_patent_app_number] => 11396871 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/396871
Data storage device, reconstruction controlling device, reconstruction controlling method, and storage medium Apr 2, 2006 Abandoned
Array ( [id] => 5161617 [patent_doc_number] => 20070174661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'System and method for providing singleton services in a cluster' [patent_app_type] => utility [patent_app_number] => 11/396826 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5993 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20070174661.pdf [firstpage_image] =>[orig_patent_app_number] => 11396826 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/396826
System and method for providing singleton services in a cluster Apr 2, 2006 Issued
Array ( [id] => 7689928 [patent_doc_number] => 20070234105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Failover to asynchronous backup site in connection with triangular asynchronous replication' [patent_app_type] => utility [patent_app_number] => 11/394663 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 47670 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20070234105.pdf [firstpage_image] =>[orig_patent_app_number] => 11394663 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394663
Failover to asynchronous backup site in connection with triangular asynchronous replication Mar 30, 2006 Abandoned
Array ( [id] => 368343 [patent_doc_number] => 07480817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-20 [patent_title] => 'Method for replicating data based on probability of concurrent failure' [patent_app_type] => utility [patent_app_number] => 11/395018 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4925 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/480/07480817.pdf [firstpage_image] =>[orig_patent_app_number] => 11395018 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/395018
Method for replicating data based on probability of concurrent failure Mar 30, 2006 Issued
Array ( [id] => 7689908 [patent_doc_number] => 20070234125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Logic soft error rate prediction and improvement' [patent_app_type] => utility [patent_app_number] => 11/395119 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20070234125.pdf [firstpage_image] =>[orig_patent_app_number] => 11395119 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/395119
Logic soft error rate prediction and improvement Mar 30, 2006 Issued
Array ( [id] => 7689932 [patent_doc_number] => 20070234101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Information error recovery apparatus and methods' [patent_app_type] => utility [patent_app_number] => 11/394261 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5782 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20070234101.pdf [firstpage_image] =>[orig_patent_app_number] => 11394261 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394261
Information error recovery apparatus and methods Mar 29, 2006 Issued
Array ( [id] => 372062 [patent_doc_number] => 07478274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-13 [patent_title] => 'Duplex system' [patent_app_type] => utility [patent_app_number] => 11/396076 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2618 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/478/07478274.pdf [firstpage_image] =>[orig_patent_app_number] => 11396076 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/396076
Duplex system Mar 29, 2006 Issued
Array ( [id] => 5226711 [patent_doc_number] => 20070255978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'Retroactive verbose logging' [patent_app_type] => utility [patent_app_number] => 11/390904 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20070255978.pdf [firstpage_image] =>[orig_patent_app_number] => 11390904 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390904
Retroactive verbose logging Mar 27, 2006 Issued
Array ( [id] => 5065047 [patent_doc_number] => 20070226689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Mechanism for selectively allowing certain components in a group of components to be associated with a target component' [patent_app_type] => utility [patent_app_number] => 11/387916 [patent_app_country] => US [patent_app_date] => 2006-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20070226689.pdf [firstpage_image] =>[orig_patent_app_number] => 11387916 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/387916
Mechanism for selectively allowing certain components in a group of components to be associated with a target component Mar 21, 2006 Abandoned
Array ( [id] => 5190428 [patent_doc_number] => 20070168737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'DEBUGGING DEVICE USING AN LPC INTERFACE CAPABLE OF RECOVERING FUNCTIONS OF BIOS, AND DEBUGGING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 11/308312 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2812 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20070168737.pdf [firstpage_image] =>[orig_patent_app_number] => 11308312 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308312
DEBUGGING DEVICE USING AN LPC INTERFACE CAPABLE OF RECOVERING FUNCTIONS OF BIOS, AND DEBUGGING METHOD THEREFOR Mar 15, 2006 Abandoned
Array ( [id] => 309628 [patent_doc_number] => 07533290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Microcode updating error handling apparatus and method thereof' [patent_app_type] => utility [patent_app_number] => 11/307775 [patent_app_country] => US [patent_app_date] => 2006-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3022 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/533/07533290.pdf [firstpage_image] =>[orig_patent_app_number] => 11307775 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/307775
Microcode updating error handling apparatus and method thereof Feb 20, 2006 Issued
Array ( [id] => 890843 [patent_doc_number] => 07353434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'Method for controlling storage system' [patent_app_type] => utility [patent_app_number] => 11/346763 [patent_app_country] => US [patent_app_date] => 2006-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 13741 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/353/07353434.pdf [firstpage_image] =>[orig_patent_app_number] => 11346763 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/346763
Method for controlling storage system Feb 2, 2006 Issued
Array ( [id] => 596734 [patent_doc_number] => 07454653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-18 [patent_title] => 'Reliability of diskless network-bootable computers using non-volatile memory cache' [patent_app_type] => utility [patent_app_number] => 11/329332 [patent_app_country] => US [patent_app_date] => 2006-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8038 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/454/07454653.pdf [firstpage_image] =>[orig_patent_app_number] => 11329332 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/329332
Reliability of diskless network-bootable computers using non-volatile memory cache Jan 9, 2006 Issued
Array ( [id] => 5161674 [patent_doc_number] => 20070174718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Generation and use of system level defect tables for main memory' [patent_app_type] => utility [patent_app_number] => 11/323029 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2923 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20070174718.pdf [firstpage_image] =>[orig_patent_app_number] => 11323029 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/323029
Generation and use of system level defect tables for main memory Dec 29, 2005 Issued
Array ( [id] => 5633533 [patent_doc_number] => 20060150004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Fault tolerant system and controller, operation method, and operation program used in the fault tolerant system' [patent_app_type] => utility [patent_app_number] => 11/311338 [patent_app_country] => US [patent_app_date] => 2005-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20060150004.pdf [firstpage_image] =>[orig_patent_app_number] => 11311338 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/311338
Fault tolerant system and controller, operation method, and operation program used in the fault tolerant system Dec 19, 2005 Issued
Array ( [id] => 302155 [patent_doc_number] => 07539897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-26 [patent_title] => 'Fault tolerant system and controller, access control method, and control program used in the fault tolerant system' [patent_app_type] => utility [patent_app_number] => 11/311151 [patent_app_country] => US [patent_app_date] => 2005-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4400 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/539/07539897.pdf [firstpage_image] =>[orig_patent_app_number] => 11311151 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/311151
Fault tolerant system and controller, access control method, and control program used in the fault tolerant system Dec 19, 2005 Issued
Array ( [id] => 5633538 [patent_doc_number] => 20060150009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Computer system and method for dealing with errors' [patent_app_type] => utility [patent_app_number] => 11/311401 [patent_app_country] => US [patent_app_date] => 2005-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20060150009.pdf [firstpage_image] =>[orig_patent_app_number] => 11311401 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/311401
Computer system and method for dealing with errors Dec 19, 2005 Issued
Array ( [id] => 5633531 [patent_doc_number] => 20060150002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Starting control method, duplex platform system, and information processor' [patent_app_type] => utility [patent_app_number] => 11/304565 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4255 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20060150002.pdf [firstpage_image] =>[orig_patent_app_number] => 11304565 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/304565
Starting control method, duplex platform system, and information processor Dec 15, 2005 Issued
Array ( [id] => 5042382 [patent_doc_number] => 20070094664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Programmable priority for concurrent multi-threaded processors' [patent_app_type] => utility [patent_app_number] => 11/256631 [patent_app_country] => US [patent_app_date] => 2005-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8982 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20070094664.pdf [firstpage_image] =>[orig_patent_app_number] => 11256631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/256631
Programmable priority for concurrent multi-threaded processors Oct 20, 2005 Abandoned
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