| Application number | Title of the application | Filing Date | Status |
|---|
| 08/005423 | DYNAMIC RANDOM ACCESS MEMORY DEVICE COMPRISING MEMORY CELLS HAVING CAPACITOR FORMED ABOVE CELL TRANSISTOR AND PERIPHERAL CIRCUIT FOR IMPROVING SHAPE AND ASPECT RATIO OF CONTACT HOLE IN THE PERIPHERAL CIRCUIT AND PRODUCING METHOD THEREOF | Jan 18, 1993 | Abandoned |
Array
(
[id] => 3077398
[patent_doc_number] => 05365113
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-15
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/000125
[patent_app_country] => US
[patent_app_date] => 1993-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 3205
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 257
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/365/05365113.pdf
[firstpage_image] =>[orig_patent_app_number] => 000125
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/000125 | Semiconductor device | Jan 3, 1993 | Issued |
| 07/997152 | MEMORY INTEGRATED CIRCUIT | Dec 23, 1992 | Abandoned |
Array
(
[id] => 2899619
[patent_doc_number] => 05241212
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'Semiconductor device having a redundant circuit portion and a manufacturing method of the same'
[patent_app_type] => 1
[patent_app_number] => 7/994436
[patent_app_country] => US
[patent_app_date] => 1992-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 23
[patent_no_of_words] => 5360
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/241/05241212.pdf
[firstpage_image] =>[orig_patent_app_number] => 994436
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/994436 | Semiconductor device having a redundant circuit portion and a manufacturing method of the same | Dec 20, 1992 | Issued |
Array
(
[id] => 2935941
[patent_doc_number] => 05233208
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-03
[patent_title] => 'Photocoupler surrounded by transparent and reflective resins in a preformed pin housing'
[patent_app_type] => 1
[patent_app_number] => 7/979392
[patent_app_country] => US
[patent_app_date] => 1992-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 6
[patent_no_of_words] => 1582
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/233/05233208.pdf
[firstpage_image] =>[orig_patent_app_number] => 979392
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/979392 | Photocoupler surrounded by transparent and reflective resins in a preformed pin housing | Nov 18, 1992 | Issued |
Array
(
[id] => 2991480
[patent_doc_number] => 05266835
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-30
[patent_title] => 'Semiconductor structure having a barrier layer disposed within openings of a dielectric layer'
[patent_app_type] => 1
[patent_app_number] => 7/969539
[patent_app_country] => US
[patent_app_date] => 1992-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 14
[patent_no_of_words] => 2788
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/266/05266835.pdf
[firstpage_image] =>[orig_patent_app_number] => 969539
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/969539 | Semiconductor structure having a barrier layer disposed within openings of a dielectric layer | Oct 29, 1992 | Issued |
Array
(
[id] => 3524268
[patent_doc_number] => 05530292
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Semiconductor device having a plurality of chips'
[patent_app_type] => 1
[patent_app_number] => 7/961171
[patent_app_country] => US
[patent_app_date] => 1992-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 33
[patent_no_of_words] => 7170
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530292.pdf
[firstpage_image] =>[orig_patent_app_number] => 961171
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/961171 | Semiconductor device having a plurality of chips | Oct 15, 1992 | Issued |
Array
(
[id] => 2967695
[patent_doc_number] => 05264726
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'Chip-carrier'
[patent_app_type] => 1
[patent_app_number] => 7/962074
[patent_app_country] => US
[patent_app_date] => 1992-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3358
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/264/05264726.pdf
[firstpage_image] =>[orig_patent_app_number] => 962074
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/962074 | Chip-carrier | Oct 15, 1992 | Issued |
Array
(
[id] => 3124047
[patent_doc_number] => 05381025
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-10
[patent_title] => 'Insulated gate thyristor with gate turn on and turn off'
[patent_app_type] => 1
[patent_app_number] => 7/961041
[patent_app_country] => US
[patent_app_date] => 1992-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 3299
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/381/05381025.pdf
[firstpage_image] =>[orig_patent_app_number] => 961041
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/961041 | Insulated gate thyristor with gate turn on and turn off | Oct 13, 1992 | Issued |
Array
(
[id] => 3017351
[patent_doc_number] => 05309011
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-03
[patent_title] => 'Wafer scale or full wafer memory system, packaging method thereof, and wafer processing method employed therein'
[patent_app_type] => 1
[patent_app_number] => 7/960848
[patent_app_country] => US
[patent_app_date] => 1992-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 21
[patent_no_of_words] => 11752
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/309/05309011.pdf
[firstpage_image] =>[orig_patent_app_number] => 960848
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/960848 | Wafer scale or full wafer memory system, packaging method thereof, and wafer processing method employed therein | Oct 13, 1992 | Issued |
Array
(
[id] => 4137222
[patent_doc_number] => 06147359
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Method of making silicon quantum wires'
[patent_app_type] => 1
[patent_app_number] => 7/960694
[patent_app_country] => US
[patent_app_date] => 1992-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4797
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/147/06147359.pdf
[firstpage_image] =>[orig_patent_app_number] => 960694
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/960694 | Method of making silicon quantum wires | Oct 13, 1992 | Issued |
Array
(
[id] => 3518103
[patent_doc_number] => 05512783
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-30
[patent_title] => 'Semiconductor chip packages'
[patent_app_type] => 1
[patent_app_number] => 7/958448
[patent_app_country] => US
[patent_app_date] => 1992-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 4203
[patent_no_of_claims] => 60
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/512/05512783.pdf
[firstpage_image] =>[orig_patent_app_number] => 958448
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/958448 | Semiconductor chip packages | Oct 6, 1992 | Issued |
| 07/954593 | SIDEWALL ANTI-FUSE STRUCTURE AND METHOD FOR MAKING | Sep 29, 1992 | Abandoned |
Array
(
[id] => 3432087
[patent_doc_number] => 05455447
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Vertical PNP transistor in merged bipolar/CMOS technology'
[patent_app_type] => 1
[patent_app_number] => 7/954605
[patent_app_country] => US
[patent_app_date] => 1992-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 3496
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/455/05455447.pdf
[firstpage_image] =>[orig_patent_app_number] => 954605
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/954605 | Vertical PNP transistor in merged bipolar/CMOS technology | Sep 29, 1992 | Issued |
Array
(
[id] => 3112373
[patent_doc_number] => 05408117
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Semiconductor device and method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 7/953301
[patent_app_country] => US
[patent_app_date] => 1992-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 5673
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/408/05408117.pdf
[firstpage_image] =>[orig_patent_app_number] => 953301
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/953301 | Semiconductor device and method of fabricating the same | Sep 27, 1992 | Issued |
Array
(
[id] => 3092725
[patent_doc_number] => 05278437
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-11
[patent_title] => 'Stacked capacitor type semiconductor memory device and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 7/947615
[patent_app_country] => US
[patent_app_date] => 1992-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 47
[patent_no_of_words] => 5397
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/278/05278437.pdf
[firstpage_image] =>[orig_patent_app_number] => 947615
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/947615 | Stacked capacitor type semiconductor memory device and manufacturing method thereof | Sep 20, 1992 | Issued |
| 07/932916 | UNI-DIRECTIONAL FLASH DEVICE | Sep 8, 1992 | Abandoned |
Array
(
[id] => 2989636
[patent_doc_number] => 05250843
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-05
[patent_title] => 'Multichip integrated circuit modules'
[patent_app_type] => 1
[patent_app_number] => 7/942105
[patent_app_country] => US
[patent_app_date] => 1992-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 40
[patent_no_of_words] => 25881
[patent_no_of_claims] => 54
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/250/05250843.pdf
[firstpage_image] =>[orig_patent_app_number] => 942105
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/942105 | Multichip integrated circuit modules | Sep 7, 1992 | Issued |
| 07/938789 | INTERCONNECT FOR A SEMICONDUCTOR DEVICE COMPRISING A TRENCH | Aug 31, 1992 | Abandoned |
Array
(
[id] => 3049688
[patent_doc_number] => 05334855
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-02
[patent_title] => 'Diamond/phosphor polycrystalline led and display'
[patent_app_type] => 1
[patent_app_number] => 7/933837
[patent_app_country] => US
[patent_app_date] => 1992-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3655
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/334/05334855.pdf
[firstpage_image] =>[orig_patent_app_number] => 933837
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/933837 | Diamond/phosphor polycrystalline led and display | Aug 23, 1992 | Issued |