Search

Enam Ahmed

Examiner (ID: 10807, Phone: (571)270-1729 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112
Total Applications
834
Issued Applications
668
Pending Applications
34
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18358341 [patent_doc_number] => 11646752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 4096-symbol mapping, and bit interleaving method using same [patent_app_type] => utility [patent_app_number] => 17/479763 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7039 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479763 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/479763
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 4096-symbol mapping, and bit interleaving method using same Sep 19, 2021 Issued
Array ( [id] => 19965513 [patent_doc_number] => 12335037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Digital radio receivers [patent_app_type] => utility [patent_app_number] => 18/024468 [patent_app_country] => US [patent_app_date] => 2021-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1026 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18024468 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/024468
Digital radio receivers Sep 5, 2021 Issued
Array ( [id] => 18030691 [patent_doc_number] => 11513880 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-11-29 [patent_title] => Failure bit count circuit for memory and method thereof [patent_app_type] => utility [patent_app_number] => 17/412289 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4925 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412289 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/412289
Failure bit count circuit for memory and method thereof Aug 25, 2021 Issued
Array ( [id] => 17869257 [patent_doc_number] => 20220291994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => INFORMATION PROCESSING SYSTEM, STORAGE DEVICE, AND HOST [patent_app_type] => utility [patent_app_number] => 17/409950 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409950 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409950
Information processing system, storage device, and host Aug 23, 2021 Issued
Array ( [id] => 17247870 [patent_doc_number] => 20210367615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND 4096-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME [patent_app_type] => utility [patent_app_number] => 17/391991 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391991
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 4096-symbol mapping, and bit interleaving method using same Aug 1, 2021 Issued
Array ( [id] => 18089238 [patent_doc_number] => 11539379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 1024-symbol mapping, and bit interleaving method using same [patent_app_type] => utility [patent_app_number] => 17/385678 [patent_app_country] => US [patent_app_date] => 2021-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6574 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17385678 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/385678
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 1024-symbol mapping, and bit interleaving method using same Jul 25, 2021 Issued
Array ( [id] => 18414852 [patent_doc_number] => 11669394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Crossing frames encoding management method, memory storage apparatus and memory control circuit unit [patent_app_type] => utility [patent_app_number] => 17/376194 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10788 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/376194
Crossing frames encoding management method, memory storage apparatus and memory control circuit unit Jul 14, 2021 Issued
Array ( [id] => 19198909 [patent_doc_number] => 11996157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Processing-in-memory (PIM) devices [patent_app_type] => utility [patent_app_number] => 17/375622 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 31069 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375622 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375622
Processing-in-memory (PIM) devices Jul 13, 2021 Issued
Array ( [id] => 18126243 [patent_doc_number] => 20230011863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => ERROR CONTAINMENT FOR ENABLING LOCAL CHECKPOINT AND RECOVERY [patent_app_type] => utility [patent_app_number] => 17/373678 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17373678 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/373678
Error containment for enabling local checkpoint and recovery Jul 11, 2021 Issued
Array ( [id] => 18122803 [patent_doc_number] => 20230008412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => MULTIPLE BLOCK ERROR CORRECTION IN AN INFORMATION HANDLING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/372973 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17372973 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/372973
Multiple block error correction in an information handling system Jul 11, 2021 Issued
Array ( [id] => 19812999 [patent_doc_number] => 12244414 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-03-04 [patent_title] => Early termination in convolutional low density parity check decoding [patent_app_type] => utility [patent_app_number] => 17/367161 [patent_app_country] => US [patent_app_date] => 2021-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7134 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17367161 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/367161
Early termination in convolutional low density parity check decoding Jul 1, 2021 Issued
Array ( [id] => 18235794 [patent_doc_number] => 11600358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Temperature management of memory elements of an information handling system [patent_app_type] => utility [patent_app_number] => 17/365095 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5711 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365095
Temperature management of memory elements of an information handling system Jun 30, 2021 Issued
Array ( [id] => 18066948 [patent_doc_number] => 20220398036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => SYSTEMS AND METHODS OF DETERMINING DEGRADATION IN ANALOG COMPUTE-IN-MEMORY (ACIM) MODULES [patent_app_type] => utility [patent_app_number] => 17/347457 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347457 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347457
Systems and methods of determining degradation in analog compute-in-memory (ACIM) modules Jun 13, 2021 Issued
Array ( [id] => 17202128 [patent_doc_number] => 20210342223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => SYSTEMS AND METHODS FOR ADAPTIVE ERROR-CORRECTION CODING [patent_app_type] => utility [patent_app_number] => 17/340355 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340355 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340355
SYSTEMS AND METHODS FOR ADAPTIVE ERROR-CORRECTION CODING Jun 6, 2021 Abandoned
Array ( [id] => 17263969 [patent_doc_number] => 20210376954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => APPARATUS AND METHOD FOR HANDLING AN INCOMING COMMUNICATION DATA FRAME [patent_app_type] => utility [patent_app_number] => 17/333365 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/333365
Apparatus and method for handling an incoming communication data frame May 27, 2021 Issued
Array ( [id] => 18072752 [patent_doc_number] => 11531586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Controller and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/330845 [patent_app_country] => US [patent_app_date] => 2021-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 13082 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17330845 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/330845
Controller and method of operating the same May 25, 2021 Issued
Array ( [id] => 18248022 [patent_doc_number] => 11604607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Reduce system active power based on memory usage patterns [patent_app_type] => utility [patent_app_number] => 17/331357 [patent_app_country] => US [patent_app_date] => 2021-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10871 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17331357 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/331357
Reduce system active power based on memory usage patterns May 25, 2021 Issued
Array ( [id] => 18493418 [patent_doc_number] => 11698835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Memory and operation method of memory [patent_app_type] => utility [patent_app_number] => 17/329681 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6992 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329681
Memory and operation method of memory May 24, 2021 Issued
Array ( [id] => 17961983 [patent_doc_number] => 20220342564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => METHOD, ELECTRONIC DEVICE, AND COMPUTER PROGRAM PRODUCT FOR STORAGE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 17/327356 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327356 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/327356
Method, electronic device, and computer program product for storage management May 20, 2021 Issued
Array ( [id] => 17372186 [patent_doc_number] => 20220027238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => METHOD FOR THE SECURED STORING OF A DATA ELEMENT TO BE STORED BY A COMPUTER PROGRAM IN AN EXTERNAL MEMORY [patent_app_type] => utility [patent_app_number] => 17/317448 [patent_app_country] => US [patent_app_date] => 2021-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317448 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317448
Method for the secured storing of a data element to be stored by a computer program in an external memory May 10, 2021 Issued
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