
Eric A. Ward
Examiner (ID: 17565, Phone: (571)270-3406 , Office: P/2891 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891 |
| Total Applications | 932 |
| Issued Applications | 671 |
| Pending Applications | 77 |
| Abandoned Applications | 202 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19517789
[patent_doc_number] => 20240349475
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => INTEGRATED CIRCUIT STRUCTURE FOR LOW POWER SRAM
[patent_app_type] => utility
[patent_app_number] => 18/755162
[patent_app_country] => US
[patent_app_date] => 2024-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7423
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18755162
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/755162 | INTEGRATED CIRCUIT STRUCTURE FOR LOW POWER SRAM | Jun 25, 2024 | Pending |
Array
(
[id] => 20352779
[patent_doc_number] => 20250349631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-13
[patent_title] => PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/660582
[patent_app_country] => US
[patent_app_date] => 2024-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3326
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660582
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/660582 | PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME | May 9, 2024 | Pending |
Array
(
[id] => 19407400
[patent_doc_number] => 20240290911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => COVER GLASS AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/658126
[patent_app_country] => US
[patent_app_date] => 2024-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5655
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658126
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/658126 | COVER GLASS AND DISPLAY DEVICE | May 7, 2024 | Pending |
Array
(
[id] => 19349453
[patent_doc_number] => 20240258417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-01
[patent_title] => SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/631091
[patent_app_country] => US
[patent_app_date] => 2024-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5456
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631091
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/631091 | Semiconductor device and fabricating method thereof | Apr 9, 2024 | Issued |
Array
(
[id] => 19321653
[patent_doc_number] => 20240243200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => SEMICONDUCTOR DEVICE WITH CONTACT PLUGS
[patent_app_type] => utility
[patent_app_number] => 18/624167
[patent_app_country] => US
[patent_app_date] => 2024-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11535
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 287
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624167
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/624167 | Semiconductor device with contact plugs | Apr 1, 2024 | Issued |
Array
(
[id] => 19781675
[patent_doc_number] => 12230714
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-18
[patent_title] => Self-aligned gate endcap (SAGE) architectures with vertical sidewalls
[patent_app_type] => utility
[patent_app_number] => 18/622615
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 28
[patent_no_of_words] => 12461
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622615
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/622615 | Self-aligned gate endcap (SAGE) architectures with vertical sidewalls | Mar 28, 2024 | Issued |
Array
(
[id] => 19468291
[patent_doc_number] => 20240321961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => INTEGRATED CIRCUIT DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/613338
[patent_app_country] => US
[patent_app_date] => 2024-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14139
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18613338
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/613338 | INTEGRATED CIRCUIT DEVICE | Mar 21, 2024 | Pending |
Array
(
[id] => 19349420
[patent_doc_number] => 20240258384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-01
[patent_title] => LATERALLY-GATED TRANSISTORS AND LATERAL SCHOTTKY DIODES WITH INTEGRATED LATERAL FIELD PLATE STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/609778
[patent_app_country] => US
[patent_app_date] => 2024-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19226
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609778
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/609778 | Laterally-gated transistors and lateral Schottky diodes with integrated lateral field plate structures | Mar 18, 2024 | Issued |
Array
(
[id] => 19452666
[patent_doc_number] => 20240312796
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => ORGANIC INTERPOSER STRUCTURE, MANUFACTURING METHOD AND PACKAGE STRUCTURE THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/603347
[patent_app_country] => US
[patent_app_date] => 2024-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3137
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603347
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/603347 | ORGANIC INTERPOSER STRUCTURE, MANUFACTURING METHOD AND PACKAGE STRUCTURE THEREOF | Mar 12, 2024 | Pending |
Array
(
[id] => 20235898
[patent_doc_number] => 20250293217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => EMBEDDED PACKAGE WITH STACKED SEMICONDUCTOR DIES
[patent_app_type] => utility
[patent_app_number] => 18/603481
[patent_app_country] => US
[patent_app_date] => 2024-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4467
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603481
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/603481 | EMBEDDED PACKAGE WITH STACKED SEMICONDUCTOR DIES | Mar 12, 2024 | Pending |
Array
(
[id] => 20885979
[patent_doc_number] => 12702039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-08-04
[patent_title] => Method of producing micro-LED panel
[patent_app_type] => utility
[patent_app_number] => 18/603263
[patent_app_country] => US
[patent_app_date] => 2024-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 38
[patent_no_of_words] => 4402
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603263
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/603263 | METHOD OF PRODUCING MICRO-LED PANEL | Mar 12, 2024 | Pending |
Array
(
[id] => 20496664
[patent_doc_number] => 12538555
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-27
[patent_title] => Diamond-like carbon coating for passive and active electronics
[patent_app_type] => utility
[patent_app_number] => 18/601289
[patent_app_country] => US
[patent_app_date] => 2024-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 3559
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601289
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/601289 | Diamond-like carbon coating for passive and active electronics | Mar 10, 2024 | Issued |
Array
(
[id] => 19252820
[patent_doc_number] => 20240203817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => SEMICONDUCTOR APPARATUS, AND MANUFACTURING METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 18/591744
[patent_app_country] => US
[patent_app_date] => 2024-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5423
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591744
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/591744 | SEMICONDUCTOR APPARATUS, AND MANUFACTURING METHOD THEREFOR | Feb 28, 2024 | Pending |
Array
(
[id] => 19758127
[patent_doc_number] => 20250046692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => WIRING SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/582798
[patent_app_country] => US
[patent_app_date] => 2024-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11489
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582798
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/582798 | WIRING SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME | Feb 20, 2024 | Pending |
Array
(
[id] => 19546471
[patent_doc_number] => 20240363507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE, AND LEAD FRAME
[patent_app_type] => utility
[patent_app_number] => 18/582566
[patent_app_country] => US
[patent_app_date] => 2024-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9530
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582566
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/582566 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE, AND LEAD FRAME | Feb 19, 2024 | Pending |
Array
(
[id] => 19237555
[patent_doc_number] => 20240194750
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => LAYOUT TECHNIQUES AND OPTIMIZATION FOR POWER TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 18/582153
[patent_app_country] => US
[patent_app_date] => 2024-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7501
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582153
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/582153 | Layout techniques and optimization for power transistors | Feb 19, 2024 | Issued |
Array
(
[id] => 19698500
[patent_doc_number] => 20250017045
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-09
[patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/432328
[patent_app_country] => US
[patent_app_date] => 2024-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13064
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18432328
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/432328 | DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE | Feb 4, 2024 | Pending |
Array
(
[id] => 20141010
[patent_doc_number] => 20250248054
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-31
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/428119
[patent_app_country] => US
[patent_app_date] => 2024-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428119
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/428119 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | Jan 30, 2024 | Pending |
Array
(
[id] => 20141101
[patent_doc_number] => 20250248145
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-31
[patent_title] => IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 18/427823
[patent_app_country] => US
[patent_app_date] => 2024-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2227
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18427823
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/427823 | IMAGE SENSOR | Jan 30, 2024 | Pending |
Array
(
[id] => 19690280
[patent_doc_number] => 20250008825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/414684
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10316
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414684
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414684 | DISPLAY PANEL AND DISPLAY DEVICE | Jan 16, 2024 | Pending |