Search

Eric A. Ward

Examiner (ID: 17565, Phone: (571)270-3406 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2891
Total Applications
932
Issued Applications
671
Pending Applications
77
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17262901 [patent_doc_number] => 20210375886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => METHOD OF MANUFACTURING A THREE-DIMENSIONAL NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/398536 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17398536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/398536
METHOD OF MANUFACTURING A THREE-DIMENSIONAL NON-VOLATILE MEMORY DEVICE Aug 9, 2021 Abandoned
Array ( [id] => 19654465 [patent_doc_number] => 12176265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Semiconductor device, having via wiring, method of manufacturing semiconductor device having via wiring, and electronic apparatus with semiconductor device having via wiring [patent_app_type] => utility [patent_app_number] => 17/395505 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 37 [patent_no_of_words] => 16002 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395505 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395505
Semiconductor device, having via wiring, method of manufacturing semiconductor device having via wiring, and electronic apparatus with semiconductor device having via wiring Aug 5, 2021 Issued
Array ( [id] => 17901171 [patent_doc_number] => 20220310833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/386729 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386729 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/386729
High electron mobility transistor Jul 27, 2021 Issued
Array ( [id] => 17203850 [patent_doc_number] => 20210343945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => DISPLAY DEVICE AND METHOD OF INSPECTING THE SAME [patent_app_type] => utility [patent_app_number] => 17/378599 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378599 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/378599
Display device and method of inspecting the same Jul 15, 2021 Issued
Array ( [id] => 18456504 [patent_doc_number] => 20230197786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SiC SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/921993 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 63291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17921993 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/921993
SiC SEMICONDUCTOR DEVICE Jul 15, 2021 Pending
Array ( [id] => 20719885 [patent_doc_number] => 12635156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Self-aligning process method and self-aligning process apparatus for reducing critical dimension variation of SiC trench gate MOSFET structure [patent_app_type] => utility [patent_app_number] => 18/022988 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 7354 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18022988 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/022988
Self-aligning process method and self-aligning process apparatus for reducing critical dimension variation of SiC trench gate MOSFET structure Jul 14, 2021 Issued
Array ( [id] => 17360076 [patent_doc_number] => 20220020872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => METHOD OF FORMING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/369479 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369479 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369479
High electron mobility transistor Jul 6, 2021 Issued
Array ( [id] => 18266174 [patent_doc_number] => 20230087416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => MOS(METAL OXIDE SILICON) CONTROLLED THYRISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/792070 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792070 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792070
MOS(metal oxide silicon) controlled thyristor device Jun 9, 2021 Issued
Array ( [id] => 17373937 [patent_doc_number] => 20220028989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => FABRICATING SUB-MICRON CONTACTS TO BURIED WELL DEVICES [patent_app_type] => utility [patent_app_number] => 17/303809 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/303809
Fabricating sub-micron contacts to buried well devices Jun 7, 2021 Issued
Array ( [id] => 18767074 [patent_doc_number] => 11817488 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Method and related apparatus for integrating electronic memory in an integrated chip [patent_app_type] => utility [patent_app_number] => 17/341676 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 15026 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341676
Method and related apparatus for integrating electronic memory in an integrated chip Jun 7, 2021 Issued
Array ( [id] => 17263138 [patent_doc_number] => 20210376123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SUBSTRATE PROCESSING METHOD FOR FORMING INNER SPACERS IN A NANO-SHEET DEVICE [patent_app_type] => utility [patent_app_number] => 17/329178 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329178
SUBSTRATE PROCESSING METHOD FOR FORMING INNER SPACERS IN A NANO-SHEET DEVICE May 24, 2021 Abandoned
Array ( [id] => 17232542 [patent_doc_number] => 20210359099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => DEVICES AND METHODS FOR CREATING OHMIC CONTACTS USING BISMUTH [patent_app_type] => utility [patent_app_number] => 17/320183 [patent_app_country] => US [patent_app_date] => 2021-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/320183
Devices and methods for creating ohmic contacts using bismuth May 12, 2021 Issued
Array ( [id] => 17085771 [patent_doc_number] => 20210280778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => METHOD OF INTEGRATION OF A MAGNETORESISTIVE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/317061 [patent_app_country] => US [patent_app_date] => 2021-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317061 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317061
Method of integration of a magnetoresistive structure May 10, 2021 Issued
Array ( [id] => 17993589 [patent_doc_number] => 20220359626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/417443 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17417443 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/417443
Display device and manufacturing method of display device May 9, 2021 Issued
Array ( [id] => 17174406 [patent_doc_number] => 20210328077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Merged PiN Schottky (MPS) Diode With Multiple Cell Designs And Manufacturing Method Thereof [patent_app_type] => utility [patent_app_number] => 17/235891 [patent_app_country] => US [patent_app_date] => 2021-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17235891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/235891
Merged PiN Schottky (MPS) Diode With Multiple Cell Designs And Manufacturing Method Thereof Apr 19, 2021 Abandoned
Array ( [id] => 17174407 [patent_doc_number] => 20210328078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Merged PiN Schottky (MPS) Diode With Plasma Spreading Layer And Manufacturing Method Thereof [patent_app_type] => utility [patent_app_number] => 17/235894 [patent_app_country] => US [patent_app_date] => 2021-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17235894 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/235894
Merged PiN Schottky (MPS) Diode With Plasma Spreading Layer And Manufacturing Method Thereof Apr 19, 2021 Abandoned
Array ( [id] => 17971520 [patent_doc_number] => 11489071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/234218 [patent_app_country] => US [patent_app_date] => 2021-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 8944 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 408 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17234218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/234218
Semiconductor device Apr 18, 2021 Issued
Array ( [id] => 19063301 [patent_doc_number] => 11942556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/225306 [patent_app_country] => US [patent_app_date] => 2021-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 10742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225306
Semiconductor device and manufacturing method thereof Apr 7, 2021 Issued
Array ( [id] => 17174351 [patent_doc_number] => 20210328022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => OHMIC CONTACT FORMATION IN A SIC-BASED ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/225998 [patent_app_country] => US [patent_app_date] => 2021-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225998
Ohmic contact formation in a SiC-based electronic device Apr 7, 2021 Issued
Array ( [id] => 18105501 [patent_doc_number] => 11545398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/200989 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 13615 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200989 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200989
Semiconductor device Mar 14, 2021 Issued
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