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Eric A. Ward

Examiner (ID: 7318)

Most Active Art Unit
2891
Art Unit(s)
2891
Total Applications
917
Issued Applications
667
Pending Applications
67
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19183936 [patent_doc_number] => 11990539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Semiconductor device with conformal dielectric layer and fabricating method thereof [patent_app_type] => utility [patent_app_number] => 17/148526 [patent_app_country] => US [patent_app_date] => 2021-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5456 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17148526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/148526
Semiconductor device with conformal dielectric layer and fabricating method thereof Jan 12, 2021 Issued
Array ( [id] => 16812464 [patent_doc_number] => 20210135019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => TERMINATION STRUCTURE FOR INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/145607 [patent_app_country] => US [patent_app_date] => 2021-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145607 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145607
Termination structure for insulated gate semiconductor device and method Jan 10, 2021 Issued
Array ( [id] => 17278130 [patent_doc_number] => 20210384328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => POWER GENERATION ELEMENT [patent_app_type] => utility [patent_app_number] => 17/142298 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4931 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142298 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142298
Power generation element Jan 5, 2021 Issued
Array ( [id] => 17708999 [patent_doc_number] => 20220209007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => HYBRID SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/136816 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7669 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136816
Hybrid semiconductor device Dec 28, 2020 Issued
Array ( [id] => 17901320 [patent_doc_number] => 20220310982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => PEROVSKITE LIGHT-EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/414003 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17414003 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/414003
Perovskite light-emitting diode and method of manufacturing the same Dec 22, 2020 Issued
Array ( [id] => 16812430 [patent_doc_number] => 20210134985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => Conformal Transfer Doping Method for Fin-Like Field Effect Transistor [patent_app_type] => utility [patent_app_number] => 17/121007 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/121007
Conformal transfer doping method for fin-like field effect transistor Dec 13, 2020 Issued
Array ( [id] => 19582606 [patent_doc_number] => 12148734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Transistors, memory cells, and arrangements thereof [patent_app_type] => utility [patent_app_number] => 17/117350 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 14626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117350 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/117350
Transistors, memory cells, and arrangements thereof Dec 9, 2020 Issued
Array ( [id] => 17582955 [patent_doc_number] => 20220139810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => DEVICE TOPOLOGY FOR LATERAL POWER TRANSISTORS WITH LOW COMMON SOURCE INDUCTANCE [patent_app_type] => utility [patent_app_number] => 17/117449 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117449 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/117449
Device topology for lateral power transistors with low common source inductance Dec 9, 2020 Issued
Array ( [id] => 20230455 [patent_doc_number] => 12419120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Solid-state imaging device and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/781675 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 9243 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17781675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/781675
Solid-state imaging device and electronic apparatus Dec 7, 2020 Issued
Array ( [id] => 16715790 [patent_doc_number] => 20210082937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => Integrated Structures Containing Vertically-Stacked Memory Cells [patent_app_type] => utility [patent_app_number] => 17/107814 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107814 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107814
Integrated structures containing vertically-stacked memory cells Nov 29, 2020 Issued
Array ( [id] => 17470138 [patent_doc_number] => 11276621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/107628 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12257 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 605 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107628
Semiconductor device Nov 29, 2020 Issued
Array ( [id] => 16981816 [patent_doc_number] => 20210226053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/107113 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 628 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107113
Semiconductor device Nov 29, 2020 Issued
Array ( [id] => 16873729 [patent_doc_number] => 20210167196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/951853 [patent_app_country] => US [patent_app_date] => 2020-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 455 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16951853 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/951853
Silicon carbide semiconductor device Nov 17, 2020 Issued
Array ( [id] => 20675300 [patent_doc_number] => 12615833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-28 [patent_title] => Transistor [patent_app_type] => utility [patent_app_number] => 18/004832 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 1145 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18004832 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/004832
Transistor Nov 15, 2020 Issued
Array ( [id] => 18967662 [patent_doc_number] => 11901445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Transistor and methods of fabricating a transistor [patent_app_type] => utility [patent_app_number] => 17/097012 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 7437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097012 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097012
Transistor and methods of fabricating a transistor Nov 12, 2020 Issued
Array ( [id] => 16812444 [patent_doc_number] => 20210134999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => METHODS FOR LDMOS AND OTHER MOS TRANSISTORS WITH HYBRID CONTACT [patent_app_type] => utility [patent_app_number] => 17/096264 [patent_app_country] => US [patent_app_date] => 2020-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 448 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17096264 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/096264
Methods for LDMOS and other MOS transistors with hybrid contact Nov 11, 2020 Issued
Array ( [id] => 17582954 [patent_doc_number] => 20220139809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => DEVICE TOPOLOGIES FOR HIGH CURRENT LATERAL POWER SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/085137 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085137 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/085137
Device topologies for high current lateral power semiconductor devices Oct 29, 2020 Issued
Array ( [id] => 19627022 [patent_doc_number] => 12165871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Method for manufacturing a gate terminal of a HEMT device, and HEMT device [patent_app_type] => utility [patent_app_number] => 17/083181 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4053 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17083181 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/083181
Method for manufacturing a gate terminal of a HEMT device, and HEMT device Oct 27, 2020 Issued
Array ( [id] => 17566866 [patent_doc_number] => 20220131015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => SIC MOSFET WITH BUILT-IN SCHOTTKY DIODE [patent_app_type] => utility [patent_app_number] => 16/949395 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949395 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/949395
SiC MOSFET with built-in Schottky diode Oct 27, 2020 Issued
Array ( [id] => 17566867 [patent_doc_number] => 20220131016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => CHARGE BALANCED RECTIFIER WITH SHIELDING [patent_app_type] => utility [patent_app_number] => 16/949394 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949394 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/949394
CHARGE BALANCED RECTIFIER WITH SHIELDING Oct 27, 2020 Abandoned
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