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Eric A. Ward

Examiner (ID: 5402)

Most Active Art Unit
2891
Art Unit(s)
2891
Total Applications
925
Issued Applications
670
Pending Applications
71
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19741131 [patent_doc_number] => 12217975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Semiconductor device having metal gate and poly gate [patent_app_type] => utility [patent_app_number] => 18/527151 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527151 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527151
Semiconductor device having metal gate and poly gate Nov 30, 2023 Issued
Array ( [id] => 19828844 [patent_doc_number] => 12249640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Conformal transfer doping method for Fin-like field effect transistor [patent_app_type] => utility [patent_app_number] => 18/524417 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 11940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524417 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524417
Conformal transfer doping method for Fin-like field effect transistor Nov 29, 2023 Issued
Array ( [id] => 19881258 [patent_doc_number] => 20250113515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/522901 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522901
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR Nov 28, 2023 Pending
Array ( [id] => 19349408 [patent_doc_number] => 20240258372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => ELECTRONIC COMPONENT AND PACKAGE INCLUDING STRESS RELEASE STRUCTURE AS LATERAL EDGE PORTION OF SEMICONDUCTOR BODY [patent_app_type] => utility [patent_app_number] => 18/518846 [patent_app_country] => US [patent_app_date] => 2023-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9838 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518846 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518846
ELECTRONIC COMPONENT AND PACKAGE INCLUDING STRESS RELEASE STRUCTURE AS LATERAL EDGE PORTION OF SEMICONDUCTOR BODY Nov 23, 2023 Pending
Array ( [id] => 20307100 [patent_doc_number] => 12453111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Channel stop and well dopant migration control implant for reduced MOS threshold voltage mismatch [patent_app_type] => utility [patent_app_number] => 18/512506 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 3440 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512506 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512506
Channel stop and well dopant migration control implant for reduced MOS threshold voltage mismatch Nov 16, 2023 Issued
Array ( [id] => 20011215 [patent_doc_number] => 20250149437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => INTERCONNECTION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/502792 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18502792 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/502792
INTERCONNECTION STRUCTURE Nov 5, 2023 Pending
Array ( [id] => 19161329 [patent_doc_number] => 20240154036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => STACK OF MONOCRYSTALLINE LAYERS FOR PRODUCING MICROELECTRONIC DEVICES WITH 3D ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/502862 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18502862 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/502862
STACK OF MONOCRYSTALLINE LAYERS FOR PRODUCING MICROELECTRONIC DEVICES WITH 3D ARCHITECTURE Nov 5, 2023 Pending
Array ( [id] => 20734583 [patent_doc_number] => 12641848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device [patent_app_type] => utility [patent_app_number] => 18/497427 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 1184 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497427 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497427
Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device Oct 29, 2023 Issued
Array ( [id] => 19253054 [patent_doc_number] => 20240204051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SILICON CARBIDE SEMICONDUCTOR SUBSTRATE, METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR SUBSTRATE, SILICON CARBIDE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/497450 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497450 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497450
SILICON CARBIDE SEMICONDUCTOR SUBSTRATE, METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR SUBSTRATE, SILICON CARBIDE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE Oct 29, 2023 Pending
Array ( [id] => 20002406 [patent_doc_number] => 20250140628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => DIELECTRIC LAYER PROTRUSIONS [patent_app_type] => utility [patent_app_number] => 18/497424 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497424 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497424
DIELECTRIC LAYER PROTRUSIONS Oct 29, 2023 Pending
Array ( [id] => 19468334 [patent_doc_number] => 20240322004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/497446 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497446 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497446
METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE Oct 29, 2023 Pending
Array ( [id] => 20792677 [patent_doc_number] => 12666609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Semiconductor device with programmable insulating layer and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/383569 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 4558 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/383569
SEMICONDUCTOR DEVICE WITH PROGRAMMABLE INSULATING LAYER AND METHOD FOR FABRICATING THE SAME Oct 24, 2023 Issued
Array ( [id] => 19639699 [patent_doc_number] => 12170316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Nitride semiconductor device with element isolation area [patent_app_type] => utility [patent_app_number] => 18/490965 [patent_app_country] => US [patent_app_date] => 2023-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6289 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490965 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490965
Nitride semiconductor device with element isolation area Oct 19, 2023 Issued
Array ( [id] => 19409085 [patent_doc_number] => 20240292596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/489189 [patent_app_country] => US [patent_app_date] => 2023-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489189 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/489189
SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD OF FABRICATING THE SAME Oct 17, 2023 Pending
Array ( [id] => 19392962 [patent_doc_number] => 20240282832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/483720 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483720 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/483720
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Oct 9, 2023 Pending
Array ( [id] => 19895012 [patent_doc_number] => 20250120324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => MULTI-TAPERED MRAM DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/483864 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483864 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/483864
MULTI-TAPERED MRAM DEVICE STRUCTURE Oct 9, 2023 Pending
Array ( [id] => 18927350 [patent_doc_number] => 20240030354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/474842 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474842 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/474842
Semiconductor device comprising channel layers with different thicknesses Sep 25, 2023 Issued
Array ( [id] => 19881358 [patent_doc_number] => 20250113615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => ARRAY SUBSTRATE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 18/289038 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18289038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/289038
ARRAY SUBSTRATE AND DISPLAY PANEL Sep 20, 2023 Pending
Array ( [id] => 19452953 [patent_doc_number] => 20240313083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/462876 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/462876
SEMICONDUCTOR DEVICE MANUFACTURING METHOD Sep 6, 2023 Pending
Array ( [id] => 19821109 [patent_doc_number] => 20250079316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => SEMICONDUCTOR DEVICE AND ISOLATION STRUCTURE AND CONTACT ETCH STOP LAYER THEREOF [patent_app_type] => utility [patent_app_number] => 18/241413 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18241413 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/241413
SEMICONDUCTOR DEVICE AND ISOLATION STRUCTURE AND CONTACT ETCH STOP LAYER THEREOF Aug 31, 2023 Pending
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