Eric A. Ward

Array ( [id] => 15921851 [patent_doc_number] => 10658173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Method for fabricating a semiconductor structure on a semiconductor wafer [patent_app_type] => utility [patent_app_number] => 16/039284 [patent_app_country] => US [patent_app_date] => 2018-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2795 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16039284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16356681 [patent_doc_number] => 10797199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Apparatus and method for manufacturing LED module [patent_app_type] => utility [patent_app_number] => 16/038932 [patent_app_country] => US [patent_app_date] => 2018-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9573 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16038932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14381691 [patent_doc_number] => 20190164758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/037925 [patent_app_country] => US [patent_app_date] => 2018-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16037925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17196172 [patent_doc_number] => 11164939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Tunnel field-effect transistor and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/020759 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 7500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020759 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15331829 [patent_doc_number] => 20200006244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => METHOD OF PROVIDING PARTIAL ELECTRICAL SHIELDING [patent_app_type] => utility [patent_app_number] => 16/020772 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14955589 [patent_doc_number] => 10439075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-08 [patent_title] => Termination structure for insulated gate semiconductor device and method [patent_app_type] => utility [patent_app_number] => 16/020719 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 44 [patent_no_of_words] => 22245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020719 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14738513 [patent_doc_number] => 10388666 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-20 [patent_title] => Concurrent formation of memory openings and contact openings for a three-dimensional memory device [patent_app_type] => utility [patent_app_number] => 16/020739 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 85 [patent_figures_cnt] => 93 [patent_no_of_words] => 31100 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14603625 [patent_doc_number] => 10355009 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-16 [patent_title] => Concurrent formation of memory openings and contact openings for a three-dimensional memory device [patent_app_type] => utility [patent_app_number] => 16/020637 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 85 [patent_figures_cnt] => 93 [patent_no_of_words] => 31100 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15170127 [patent_doc_number] => 10490569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Three-dimensional memory device and method of making the same using concurrent formation of memory openings and contact openings [patent_app_type] => utility [patent_app_number] => 16/020817 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 118 [patent_figures_cnt] => 126 [patent_no_of_words] => 46527 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16249536 [patent_doc_number] => 10748911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Integrated circuit for low power SRAM [patent_app_type] => utility [patent_app_number] => 16/020855 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020855 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15170367 [patent_doc_number] => 10490690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-26 [patent_title] => Vertical cylindrical reaction chamber for micro LED epitaxy and linear luminant fabrication process [patent_app_type] => utility [patent_app_number] => 16/016671 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 2899 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17803452 [patent_doc_number] => 11417765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Quantum dot devices with fine-pitched gates [patent_app_type] => utility [patent_app_number] => 16/017942 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 90 [patent_no_of_words] => 29800 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13832397 [patent_doc_number] => 20190019683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => METHODS OF FABRICATING FERROELECTRIC MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/016602 [patent_app_country] => US [patent_app_date] => 2018-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15475201 [patent_doc_number] => 10553485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Methods of producing fully self-aligned vias and contacts [patent_app_type] => utility [patent_app_number] => 16/015714 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 41 [patent_no_of_words] => 10627 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15299863 [patent_doc_number] => 20190393067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => BOND ALIGNMENT METHOD FOR HIGH ACCURACY AND HIGH THROUGHPUT [patent_app_type] => utility [patent_app_number] => 16/015507 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015507 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13909103 [patent_doc_number] => 20190043756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/016182 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16746631 [patent_doc_number] => 10971636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Photoelectric detection structure, manufacturing method therefor, and photoelectric detector [patent_app_type] => utility [patent_app_number] => 16/329405 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 7006 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16329405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13435557 [patent_doc_number] => 20180269321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => SEMICONDUCTOR ARRANGEMENT WITH ONE OR MORE SEMICONDUCTOR COLUMNS [patent_app_type] => utility [patent_app_number] => 15/983444 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5580 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15983444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14050145 [patent_doc_number] => 20190081180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => SEMICONDUCTOR DEVICE HAVING VERTICAL CHANNEL AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/944175 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15944175 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14985361 [patent_doc_number] => 10446602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Sensor device [patent_app_type] => utility [patent_app_number] => 15/943731 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7354 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943731 [rel_patent_id] =>[rel_patent_doc_number] =>)