Search

Eric A. Ward

Examiner (ID: 5402)

Most Active Art Unit
2891
Art Unit(s)
2891
Total Applications
925
Issued Applications
670
Pending Applications
71
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20471001 [patent_doc_number] => 12527047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Isolation structure for transistors [patent_app_type] => utility [patent_app_number] => 17/750876 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 6560 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750876 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750876
Isolation structure for transistors May 22, 2022 Issued
Array ( [id] => 20134056 [patent_doc_number] => 12376387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Semiconductor photodetector, receiver, and integrated optical device [patent_app_type] => utility [patent_app_number] => 17/750935 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 5569 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750935 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750935
Semiconductor photodetector, receiver, and integrated optical device May 22, 2022 Issued
Array ( [id] => 20418388 [patent_doc_number] => 12501693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Semiconductor device including different gate dielectric layers and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/745423 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 4598 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745423 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/745423
Semiconductor device including different gate dielectric layers and method for manufacturing the same May 15, 2022 Issued
Array ( [id] => 18774426 [patent_doc_number] => 20230369257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/743033 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17743033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/743033
Semiconductor device on wiring board having reference potential planes with openings May 11, 2022 Issued
Array ( [id] => 19781543 [patent_doc_number] => 12230581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Multi-device graded embedding package substrate and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/741649 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 6989 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 563 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741649 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/741649
Multi-device graded embedding package substrate and manufacturing method thereof May 10, 2022 Issued
Array ( [id] => 20668762 [patent_doc_number] => 12610552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Memory device and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/739871 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 3282 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739871 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739871
Memory device and method for forming the same May 8, 2022 Issued
Array ( [id] => 18163058 [patent_doc_number] => 20230029651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SPACER STRUCTURES FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/662284 [patent_app_country] => US [patent_app_date] => 2022-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17662284 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/662284
Spacer structures for semiconductor devices May 5, 2022 Issued
Array ( [id] => 17795822 [patent_doc_number] => 20220254914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => MOSFET TRANSISTORS WITH HYBRID CONTACT [patent_app_type] => utility [patent_app_number] => 17/729777 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17729777 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/729777
MOSFET transistors with hybrid contact Apr 25, 2022 Issued
Array ( [id] => 17833588 [patent_doc_number] => 20220270892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => FACILITATING FORMATION OF A VIA IN A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/723701 [patent_app_country] => US [patent_app_date] => 2022-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723701 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723701
Facilitating formation of a via in a substrate Apr 18, 2022 Issued
Array ( [id] => 20416831 [patent_doc_number] => 12500124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Method of singulating a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/721109 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 2053 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721109
Method of singulating a semiconductor device Apr 13, 2022 Issued
Array ( [id] => 18712962 [patent_doc_number] => 20230335595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => SILICON CARBIDE SEMICONDUCTOR POWER TRANSISTOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/719403 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17719403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/719403
SILICON CARBIDE SEMICONDUCTOR POWER TRANSISTOR AND METHOD OF MANUFACTURING THE SAME Apr 12, 2022 Abandoned
Array ( [id] => 19720405 [patent_doc_number] => 12205950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Guard region for an integrated circuit [patent_app_type] => utility [patent_app_number] => 17/657894 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657894 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657894
Guard region for an integrated circuit Apr 3, 2022 Issued
Array ( [id] => 17930053 [patent_doc_number] => 20220325178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => QUANTUM DOT DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/705617 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705617 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/705617
QUANTUM DOT DEVICE AND ELECTRONIC DEVICE Mar 27, 2022 Pending
Array ( [id] => 20244164 [patent_doc_number] => 12424495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Chip separation supported by back side trench and adhesive therein [patent_app_type] => utility [patent_app_number] => 17/701771 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 6021 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701771 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701771
Chip separation supported by back side trench and adhesive therein Mar 22, 2022 Issued
Array ( [id] => 19161338 [patent_doc_number] => 20240154045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => CAPACITOR COMPRISING A STACK OF LAYERS MADE OF A SEMICONDUCTOR MATERIAL HAVING A WIDE BANDGAP [patent_app_type] => utility [patent_app_number] => 18/549016 [patent_app_country] => US [patent_app_date] => 2022-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18549016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/549016
Capacitor comprising a stack of layers made of a semiconductor material having a wide bandgap Mar 2, 2022 Issued
Array ( [id] => 17661000 [patent_doc_number] => 20220181465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/652843 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652843
Semiconductor device including two thin-film transistors and method of fabricating the same Feb 27, 2022 Issued
Array ( [id] => 19116573 [patent_doc_number] => 20240128323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS (MOSFET) INCLUDING DEEP P-WELLS AND METHODS OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 18/546853 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18546853 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/546853
METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS (MOSFET) INCLUDING DEEP P-WELLS AND METHODS OF FORMING SAME Feb 17, 2022 Pending
Array ( [id] => 18555478 [patent_doc_number] => 20230253495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => BIRD'S BEAK PROFILE OF FIELD OXIDE REGION [patent_app_type] => utility [patent_app_number] => 17/665381 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17665381 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/665381
Bird's beak profile of field oxide region Feb 3, 2022 Issued
Array ( [id] => 18540810 [patent_doc_number] => 20230245921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/587299 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587299 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/587299
Semiconductor structure including isolation structure with dielectric stack and method of forming the same Jan 27, 2022 Issued
Array ( [id] => 17583104 [patent_doc_number] => 20220139959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => FeRAM MFM STRUCTURE WITH SELECTIVE ELECTRODE ETCH [patent_app_type] => utility [patent_app_number] => 17/574010 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574010 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574010
FeRAM MFM structure with selective electrode etch Jan 11, 2022 Issued
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