Eric Cardwell

Array ( [id] => 9224918 [patent_doc_number] => 20140019693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'PARALLEL PROCESSING OF A SINGLE DATA BUFFER' [patent_app_type] => utility [patent_app_number] => 13/631761 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9372443 [patent_doc_number] => 20140082316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'SELECTING PAGES IMPLEMENTING LEAF NODES AND INTERNAL NODES OF A DATA SET INDEX FOR REUSE' [patent_app_type] => utility [patent_app_number] => 13/619962 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5621 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13619962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9967792 [patent_doc_number] => 09015427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Systems and methods for employing an electronically-readable monitoring module associated with a customer replaceable component to update a non-volatile memory in an image forming device' [patent_app_type] => utility [patent_app_number] => 13/620530 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7102 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8868102 [patent_doc_number] => 20130151805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'REORGANIZATION OF SOFTWARE IMAGES BASED ON PREDICTED USE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/620398 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6607 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9825974 [patent_doc_number] => 08935470 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-13 [patent_title] => 'Pruning a filemark cache used to cache filemark metadata for virtual tapes' [patent_app_type] => utility [patent_app_number] => 13/620394 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11959 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9834453 [patent_doc_number] => 08943287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-27 [patent_title] => 'Multi-core processor system configured to constrain access rate from memory' [patent_app_type] => utility [patent_app_number] => 13/550877 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3518 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550877 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8816590 [patent_doc_number] => 20130117635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY DEVICE AND CONTROLLING METHOD OF CONTROLLING NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/550980 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10624 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550980 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10027783 [patent_doc_number] => 09069684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'System, method, and computer program product for invalidatng cache lines' [patent_app_type] => utility [patent_app_number] => 13/550487 [patent_app_country] => US [patent_app_date] => 2012-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4146 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8861442 [patent_doc_number] => 08463994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'System and method for improved media identification in a storage device' [patent_app_type] => utility [patent_app_number] => 13/533046 [patent_app_country] => US [patent_app_date] => 2012-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5181 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13533046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11306411 [patent_doc_number] => 09513807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Highly scalable storage array management with reduced latency' [patent_app_type] => utility [patent_app_number] => 13/495232 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7963 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10543560 [patent_doc_number] => 09268691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Fast mechanism for accessing 2n±1 interleaved memory system' [patent_app_type] => utility [patent_app_number] => 13/993680 [patent_app_country] => US [patent_app_date] => 2012-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 12275 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13993680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10150845 [patent_doc_number] => 09183136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Storage control apparatus and storage control method' [patent_app_type] => utility [patent_app_number] => 13/512143 [patent_app_country] => US [patent_app_date] => 2012-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 17224 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13512143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9229737 [patent_doc_number] => 08635417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-21 [patent_title] => 'Memory system including variable write command scheduling' [patent_app_type] => utility [patent_app_number] => 13/468850 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4455 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8372433 [patent_doc_number] => 20120221822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'OPTIMIZATION OF DATA MIGRATION BETWEEN STORAGE MEDIUMS' [patent_app_type] => utility [patent_app_number] => 13/458872 [patent_app_country] => US [patent_app_date] => 2012-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4111 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13458872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9652091 [patent_doc_number] => 08806125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Storage system comprising power saving function' [patent_app_type] => utility [patent_app_number] => 13/451617 [patent_app_country] => US [patent_app_date] => 2012-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 43 [patent_no_of_words] => 19646 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13451617 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8334387 [patent_doc_number] => 20120201089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'INTEGRATED CIRCUIT DEVICE COMPRISES AN INTERFACE TO TRANSMIT A FIRST CODE, A STROBE SIGNAL AFTER A DELAY AND DATA TO A DYNAMIC RANDOM ACCESS MEMORY (DRAM)' [patent_app_type] => utility [patent_app_number] => 13/451252 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18616 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13451252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8958985 [patent_doc_number] => 08504779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Memory coherence directory supporting remotely sourced requests of nodal scope' [patent_app_type] => utility [patent_app_number] => 13/445010 [patent_app_country] => US [patent_app_date] => 2012-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7776 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13445010 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10052465 [patent_doc_number] => 09092344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Solid state drive' [patent_app_type] => utility [patent_app_number] => 13/441056 [patent_app_country] => US [patent_app_date] => 2012-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3623 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13441056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9820845 [patent_doc_number] => 08930647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-06 [patent_title] => 'Multiple class memory systems' [patent_app_type] => utility [patent_app_number] => 13/441132 [patent_app_country] => US [patent_app_date] => 2012-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 102 [patent_figures_cnt] => 103 [patent_no_of_words] => 72090 [patent_no_of_claims] => 79 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13441132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10536544 [patent_doc_number] => 09262174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Dynamic bank mode addressing for memory access' [patent_app_type] => utility [patent_app_number] => 13/440945 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 11155 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440945 [rel_patent_id] =>[rel_patent_doc_number] =>)