Eric Chang

Array ( [id] => 453458 [patent_doc_number] => 07251739 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-31 [patent_title] => 'System and method for sequencing multiple write state machines' [patent_app_type] => utility [patent_app_number] => 10/749943 [patent_app_country] => US [patent_app_date] => 2003-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3387 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/251/07251739.pdf [firstpage_image] =>[orig_patent_app_number] => 10749943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 58594 [patent_doc_number] => 07770034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-03 [patent_title] => 'Performance monitoring based dynamic voltage and frequency scaling' [patent_app_type] => utility [patent_app_number] => 10/736728 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3056 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/770/07770034.pdf [firstpage_image] =>[orig_patent_app_number] => 10736728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 937651 [patent_doc_number] => 06976185 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-13 [patent_title] => 'Delay locked loop for an FPGA architecture' [patent_app_type] => utility [patent_app_number] => 10/722636 [patent_app_country] => US [patent_app_date] => 2003-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5262 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/976/06976185.pdf [firstpage_image] =>[orig_patent_app_number] => 10722636 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7118958 [patent_doc_number] => 20050071705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Adaptive temperature dependent feedback clock control system and method' [patent_app_type] => utility [patent_app_number] => 10/675525 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6820 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20050071705.pdf [firstpage_image] =>[orig_patent_app_number] => 10675525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7271437 [patent_doc_number] => 20040059955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Timing adjustment of clock signals in a digital circuit' [patent_app_type] => new [patent_app_number] => 10/668357 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 21300 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20040059955.pdf [firstpage_image] =>[orig_patent_app_number] => 10668357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 590475 [patent_doc_number] => 07464282 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-09 [patent_title] => 'Apparatus and method for producing dummy data and output clock generator using same' [patent_app_type] => utility [patent_app_number] => 10/654322 [patent_app_country] => US [patent_app_date] => 2003-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 10708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/464/07464282.pdf [firstpage_image] =>[orig_patent_app_number] => 10654322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7262325 [patent_doc_number] => 20040260962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Systems and methods for latching data' [patent_app_type] => new [patent_app_number] => 10/601441 [patent_app_country] => US [patent_app_date] => 2003-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5132 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20040260962.pdf [firstpage_image] =>[orig_patent_app_number] => 10601441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7262322 [patent_doc_number] => 20040260961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Synchronized serial interface' [patent_app_type] => new [patent_app_number] => 10/601502 [patent_app_country] => US [patent_app_date] => 2003-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2925 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20040260961.pdf [firstpage_image] =>[orig_patent_app_number] => 10601502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 873671 [patent_doc_number] => 07366927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-29 [patent_title] => 'Method and device for handling requests for changing system mode' [patent_app_type] => utility [patent_app_number] => 10/459085 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4927 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366927.pdf [firstpage_image] =>[orig_patent_app_number] => 10459085 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 852115 [patent_doc_number] => 07383431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Control system and method for rewriting data in a flash memory and a data storage medium in which a program is stored for rewriting data in a flash memory' [patent_app_type] => utility [patent_app_number] => 10/460459 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7658 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/383/07383431.pdf [firstpage_image] =>[orig_patent_app_number] => 10460459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 513179 [patent_doc_number] => 07206928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'System boot method' [patent_app_type] => utility [patent_app_number] => 10/454388 [patent_app_country] => US [patent_app_date] => 2003-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3203 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206928.pdf [firstpage_image] =>[orig_patent_app_number] => 10454388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7277516 [patent_doc_number] => 20040236967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Employing sense resistor as safety fuse in Limited Power Source Applications' [patent_app_type] => new [patent_app_number] => 10/440565 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2781 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20040236967.pdf [firstpage_image] =>[orig_patent_app_number] => 10440565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7437159 [patent_doc_number] => 20040230848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Power-aware adaptation in a data center' [patent_app_type] => new [patent_app_number] => 10/436849 [patent_app_country] => US [patent_app_date] => 2003-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2649 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20040230848.pdf [firstpage_image] =>[orig_patent_app_number] => 10436849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6768734 [patent_doc_number] => 20030214674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Information processing apparatus and memory update method in the apparatus' [patent_app_type] => new [patent_app_number] => 10/435084 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20030214674.pdf [firstpage_image] =>[orig_patent_app_number] => 10435084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7321287 [patent_doc_number] => 20040225874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Method for reduced BIOS boot time' [patent_app_type] => new [patent_app_number] => 10/435145 [patent_app_country] => US [patent_app_date] => 2003-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2734 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225874.pdf [firstpage_image] =>[orig_patent_app_number] => 10435145 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6771317 [patent_doc_number] => 20030217257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Method for updating memory resident firmware as a background operation' [patent_app_type] => new [patent_app_number] => 10/430607 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20030217257.pdf [firstpage_image] =>[orig_patent_app_number] => 10430607 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 241534 [patent_doc_number] => 07594260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-22 [patent_title] => 'Network surveillance using long-term and short-term statistical profiles to determine suspicious network activity' [patent_app_type] => utility [patent_app_number] => 10/429611 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7794 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/594/07594260.pdf [firstpage_image] =>[orig_patent_app_number] => 10429611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 766053 [patent_doc_number] => 07013399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-14 [patent_title] => 'Power supply apparatus to detect power failure and use signaling voltages to issue network alert' [patent_app_type] => utility [patent_app_number] => 10/425575 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/013/07013399.pdf [firstpage_image] =>[orig_patent_app_number] => 10425575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6822933 [patent_doc_number] => 20030221094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Method and system for configuring a computer' [patent_app_type] => new [patent_app_number] => 10/417153 [patent_app_country] => US [patent_app_date] => 2003-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5991 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20030221094.pdf [firstpage_image] =>[orig_patent_app_number] => 10417153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7036363 [patent_doc_number] => 20050033996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Method and apparatus for a communication hub' [patent_app_type] => utility [patent_app_number] => 10/412707 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4328 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20050033996.pdf [firstpage_image] =>[orig_patent_app_number] => 10412707 [rel_patent_id] =>[rel_patent_doc_number] =>)