Search

Eric Chang

Examiner (ID: 19718, Phone: (571)272-3671 , Office: P/2116 )

Most Active Art Unit
2116
Art Unit(s)
2185, 2186, 2116
Total Applications
657
Issued Applications
458
Pending Applications
14
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7175002 [patent_doc_number] => 20040078664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'Information processing unit selecting one of reset vector addresses' [patent_app_type] => new [patent_app_number] => 10/157884 [patent_app_country] => US [patent_app_date] => 2002-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5316 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20040078664.pdf [firstpage_image] =>[orig_patent_app_number] => 10157884 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/157884
Information processing unit selecting one of reset vector addresses May 30, 2002 Issued
Array ( [id] => 6051339 [patent_doc_number] => 20020169905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Data transfer control device, electronic equipment, and data transfer control method' [patent_app_type] => new [patent_app_number] => 10/140829 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 13332 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20020169905.pdf [firstpage_image] =>[orig_patent_app_number] => 10140829 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/140829
Data transfer control device, electronic equipment, and data transfer control method May 8, 2002 Issued
Array ( [id] => 6685045 [patent_doc_number] => 20030120909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Boot process' [patent_app_type] => new [patent_app_number] => 10/032141 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3453 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20030120909.pdf [firstpage_image] =>[orig_patent_app_number] => 10032141 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/032141
Method and apparatus for using a volume top file to boot firmware modules Dec 19, 2001 Issued
Array ( [id] => 6670510 [patent_doc_number] => 20030115495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Conserving energy in a data processing system by selectively powering down processors' [patent_app_type] => new [patent_app_number] => 10/015225 [patent_app_country] => US [patent_app_date] => 2001-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3280 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20030115495.pdf [firstpage_image] =>[orig_patent_app_number] => 10015225 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/015225
Conserving energy in a data processing system by selectively powering down processors Dec 12, 2001 Issued
Array ( [id] => 6099174 [patent_doc_number] => 20020053038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-02 [patent_title] => 'Adaptive issue queue for reduced power at high performance' [patent_app_type] => new [patent_app_number] => 09/971186 [patent_app_country] => US [patent_app_date] => 2001-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8703 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20020053038.pdf [firstpage_image] =>[orig_patent_app_number] => 09971186 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971186
Adaptive issue queue for reduced power at high performance Oct 4, 2001 Issued
Array ( [id] => 6092934 [patent_doc_number] => 20020050936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-02 [patent_title] => 'USB machine' [patent_app_type] => new [patent_app_number] => 09/962711 [patent_app_country] => US [patent_app_date] => 2001-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3877 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20020050936.pdf [firstpage_image] =>[orig_patent_app_number] => 09962711 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/962711
USB machine Sep 23, 2001 Abandoned
Array ( [id] => 1011457 [patent_doc_number] => 06901527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Synchronizing multiple time stamps distributed within a computer system with main time of day register' [patent_app_type] => utility [patent_app_number] => 09/961015 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2876 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/901/06901527.pdf [firstpage_image] =>[orig_patent_app_number] => 09961015 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961015
Synchronizing multiple time stamps distributed within a computer system with main time of day register Sep 20, 2001 Issued
Array ( [id] => 989560 [patent_doc_number] => 06922789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Apparatus and method for recalibrating a source-synchronous pipelined self-timed bus interface' [patent_app_type] => utility [patent_app_number] => 09/960023 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1698 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/922/06922789.pdf [firstpage_image] =>[orig_patent_app_number] => 09960023 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/960023
Apparatus and method for recalibrating a source-synchronous pipelined self-timed bus interface Sep 20, 2001 Issued
Array ( [id] => 7604337 [patent_doc_number] => 07116599 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-03 [patent_title] => 'High speed FIFO synchronous programmable full and empty flag generation' [patent_app_type] => utility [patent_app_number] => 09/957587 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2478 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/116/07116599.pdf [firstpage_image] =>[orig_patent_app_number] => 09957587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/957587
High speed FIFO synchronous programmable full and empty flag generation Sep 19, 2001 Issued
Array ( [id] => 6722400 [patent_doc_number] => 20030056090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Computer system component initialization using a BIOS formal hardware language to represent the initialization requirements' [patent_app_type] => new [patent_app_number] => 09/957789 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4437 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056090.pdf [firstpage_image] =>[orig_patent_app_number] => 09957789 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/957789
Computer system component initialization using a BIOS formal hardware language to represent the initialization requirements Sep 19, 2001 Issued
Array ( [id] => 989557 [patent_doc_number] => 06922788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Low power access to a computing unit from an external source' [patent_app_type] => utility [patent_app_number] => 09/955821 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3993 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/922/06922788.pdf [firstpage_image] =>[orig_patent_app_number] => 09955821 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/955821
Low power access to a computing unit from an external source Sep 18, 2001 Issued
Array ( [id] => 6722434 [patent_doc_number] => 20030056124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Digital-based mechanism for determining voltage' [patent_app_type] => new [patent_app_number] => 09/955681 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1723 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056124.pdf [firstpage_image] =>[orig_patent_app_number] => 09955681 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/955681
Digital-based mechanism for determining voltage Sep 18, 2001 Abandoned
Array ( [id] => 302097 [patent_doc_number] => 07539878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-26 [patent_title] => 'CPU powerdown method and apparatus therefor' [patent_app_type] => utility [patent_app_number] => 09/956300 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2750 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/539/07539878.pdf [firstpage_image] =>[orig_patent_app_number] => 09956300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956300
CPU powerdown method and apparatus therefor Sep 18, 2001 Issued
Array ( [id] => 6722367 [patent_doc_number] => 20030056057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'System and method for power reduction of memory' [patent_app_type] => new [patent_app_number] => 09/957428 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2840 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056057.pdf [firstpage_image] =>[orig_patent_app_number] => 09957428 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/957428
System and method for power reduction of memory Sep 18, 2001 Abandoned
Array ( [id] => 6239962 [patent_doc_number] => 20020044530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Control unit and multiplex communication system using the same' [patent_app_type] => new [patent_app_number] => 09/941701 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4275 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20020044530.pdf [firstpage_image] =>[orig_patent_app_number] => 09941701 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/941701
Control unit and multiplex communication system using the same Aug 29, 2001 Issued
Array ( [id] => 539897 [patent_doc_number] => 07188260 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-03-06 [patent_title] => 'Apparatus and method for centralized power management' [patent_app_type] => utility [patent_app_number] => 09/947081 [patent_app_country] => US [patent_app_date] => 2001-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 13616 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/188/07188260.pdf [firstpage_image] =>[orig_patent_app_number] => 09947081 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/947081
Apparatus and method for centralized power management Aug 28, 2001 Issued
Array ( [id] => 6484464 [patent_doc_number] => 20020023233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Methods and apparatus for wireless control of remote devices' [patent_app_type] => new [patent_app_number] => 09/927104 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3698 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20020023233.pdf [firstpage_image] =>[orig_patent_app_number] => 09927104 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927104
Methods and apparatus for wireless control of remote devices Aug 9, 2001 Abandoned
Array ( [id] => 1059004 [patent_doc_number] => 06857065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'System and method for system initializating a data processing system by selecting parameters from one of a user-defined input, a serial non-volatile memory and a parallel non-volatile memory' [patent_app_type] => utility [patent_app_number] => 09/898812 [patent_app_country] => US [patent_app_date] => 2001-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2256 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857065.pdf [firstpage_image] =>[orig_patent_app_number] => 09898812 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/898812
System and method for system initializating a data processing system by selecting parameters from one of a user-defined input, a serial non-volatile memory and a parallel non-volatile memory Jul 4, 2001 Issued
Array ( [id] => 6310813 [patent_doc_number] => 20020095609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'Multiprocessor apparatus' [patent_app_type] => new [patent_app_number] => 09/895151 [patent_app_country] => US [patent_app_date] => 2001-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6929 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20020095609.pdf [firstpage_image] =>[orig_patent_app_number] => 09895151 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/895151
Multiprocessor apparatus Jul 1, 2001 Abandoned
Array ( [id] => 942253 [patent_doc_number] => 06970392 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-29 [patent_title] => 'High speed asynchronous and programmable state machine for generating almost full synchronous flags in a synchronous FIFO' [patent_app_type] => utility [patent_app_number] => 09/895306 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6494 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970392.pdf [firstpage_image] =>[orig_patent_app_number] => 09895306 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/895306
High speed asynchronous and programmable state machine for generating almost full synchronous flags in a synchronous FIFO Jun 28, 2001 Issued
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