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Eric Chang

Examiner (ID: 19718, Phone: (571)272-3671 , Office: P/2116 )

Most Active Art Unit
2116
Art Unit(s)
2185, 2186, 2116
Total Applications
657
Issued Applications
458
Pending Applications
14
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1314654 [patent_doc_number] => 06622246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Method and apparatus for booting and upgrading firmware' [patent_app_type] => B1 [patent_app_number] => 09/439611 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3224 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/622/06622246.pdf [firstpage_image] =>[orig_patent_app_number] => 09439611 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/439611
Method and apparatus for booting and upgrading firmware Nov 11, 1999 Issued
Array ( [id] => 1248898 [patent_doc_number] => 06678824 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Application usage time limiter' [patent_app_type] => B1 [patent_app_number] => 09/432119 [patent_app_country] => US [patent_app_date] => 1999-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4634 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678824.pdf [firstpage_image] =>[orig_patent_app_number] => 09432119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/432119
Application usage time limiter Nov 1, 1999 Issued
Array ( [id] => 1412157 [patent_doc_number] => 06553499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Low power circuit for waking from a sleep mode by using a remote power-on signal' [patent_app_type] => B1 [patent_app_number] => 09/403473 [patent_app_country] => US [patent_app_date] => 1999-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2127 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/553/06553499.pdf [firstpage_image] =>[orig_patent_app_number] => 09403473 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/403473
Low power circuit for waking from a sleep mode by using a remote power-on signal Oct 21, 1999 Issued
Array ( [id] => 1429518 [patent_doc_number] => 06530029 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'I2C/SMBus start-stop detecting circuit that reduces the likelihood of stalling the bus due to glitches on the data line' [patent_app_type] => B1 [patent_app_number] => 09/404011 [patent_app_country] => US [patent_app_date] => 1999-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5144 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/530/06530029.pdf [firstpage_image] =>[orig_patent_app_number] => 09404011 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/404011
I2C/SMBus start-stop detecting circuit that reduces the likelihood of stalling the bus due to glitches on the data line Sep 22, 1999 Issued
Array ( [id] => 1366850 [patent_doc_number] => 06584574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Flexible phase-locked loop system to indicate synchronization using difference between internal and external clock signals' [patent_app_type] => B1 [patent_app_number] => 09/401079 [patent_app_country] => US [patent_app_date] => 1999-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 6319 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/584/06584574.pdf [firstpage_image] =>[orig_patent_app_number] => 09401079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/401079
Flexible phase-locked loop system to indicate synchronization using difference between internal and external clock signals Sep 21, 1999 Issued
Array ( [id] => 1348212 [patent_doc_number] => 06598157 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Dynamic boot block control by boot configuration determination and subsequent address modification' [patent_app_type] => B1 [patent_app_number] => 09/401613 [patent_app_country] => US [patent_app_date] => 1999-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4634 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/598/06598157.pdf [firstpage_image] =>[orig_patent_app_number] => 09401613 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/401613
Dynamic boot block control by boot configuration determination and subsequent address modification Sep 21, 1999 Issued
Array ( [id] => 1425438 [patent_doc_number] => 06535982 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Semiconductor integrated circuit employing power management device and power management method for the semiconductor integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/393319 [patent_app_country] => US [patent_app_date] => 1999-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 7409 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535982.pdf [firstpage_image] =>[orig_patent_app_number] => 09393319 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/393319
Semiconductor integrated circuit employing power management device and power management method for the semiconductor integrated circuit Sep 9, 1999 Issued
Array ( [id] => 1366836 [patent_doc_number] => 06584573 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Placing a computer system into a sleeping state' [patent_app_type] => B1 [patent_app_number] => 09/385204 [patent_app_country] => US [patent_app_date] => 1999-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/584/06584573.pdf [firstpage_image] =>[orig_patent_app_number] => 09385204 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/385204
Placing a computer system into a sleeping state Aug 29, 1999 Issued
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