
Eric Coleman
Examiner (ID: 7488, Phone: (571)272-4163 , Office: P/2183 )
| Most Active Art Unit | 2183 |
| Art Unit(s) | 2302, 2183, 2783 |
| Total Applications | 2413 |
| Issued Applications | 2133 |
| Pending Applications | 67 |
| Abandoned Applications | 235 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9145435
[patent_doc_number] => 20130299958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-14
[patent_title] => 'LEAD STRUCTURES WITH VERTICAL OFFSETS'
[patent_app_type] => utility
[patent_app_number] => 13/989314
[patent_app_country] => US
[patent_app_date] => 2011-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5480
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13989314
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/989314 | Lead structures with vertical offsets | Nov 20, 2011 | Issued |
Array
(
[id] => 9274057
[patent_doc_number] => 08637991
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-28
[patent_title] => 'Microelectronic package with terminals on dielectric mass'
[patent_app_type] => utility
[patent_app_number] => 13/295608
[patent_app_country] => US
[patent_app_date] => 2011-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 23
[patent_no_of_words] => 9509
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13295608
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/295608 | Microelectronic package with terminals on dielectric mass | Nov 13, 2011 | Issued |
Array
(
[id] => 8533894
[patent_doc_number] => 08310051
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-13
[patent_title] => 'Package-on-package with fan-out WLCSP'
[patent_app_type] => utility
[patent_app_number] => 13/280368
[patent_app_country] => US
[patent_app_date] => 2011-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 9001
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13280368
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/280368 | Package-on-package with fan-out WLCSP | Oct 24, 2011 | Issued |
Array
(
[id] => 8470283
[patent_doc_number] => 08299462
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Constructions comprising hafnium oxide and/or zirconium oxide'
[patent_app_type] => utility
[patent_app_number] => 13/280556
[patent_app_country] => US
[patent_app_date] => 2011-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 9243
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13280556
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/280556 | Constructions comprising hafnium oxide and/or zirconium oxide | Oct 24, 2011 | Issued |
Array
(
[id] => 8154757
[patent_doc_number] => 20120098061
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-26
[patent_title] => 'Structure and Method for Forming a Planar Schottky Contact'
[patent_app_type] => utility
[patent_app_number] => 13/279107
[patent_app_country] => US
[patent_app_date] => 2011-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3158
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0098/20120098061.pdf
[firstpage_image] =>[orig_patent_app_number] => 13279107
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/279107 | Semiconductor structure with a planar Schottky contact | Oct 20, 2011 | Issued |
Array
(
[id] => 9038431
[patent_doc_number] => 20130241069
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'SEMICONDUCTOR BONDING STRUCTURE BODY AND MANUFACTURING METHOD OF SEMICONDUCTOR BONDING STRUCTURE BODY'
[patent_app_type] => utility
[patent_app_number] => 13/823463
[patent_app_country] => US
[patent_app_date] => 2011-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7617
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13823463
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/823463 | Semiconductor bonding structure body and manufacturing method of semiconductor bonding structure body | Oct 16, 2011 | Issued |
Array
(
[id] => 8527765
[patent_doc_number] => 08304335
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-06
[patent_title] => 'Electrode structure, semiconductor element, and methods of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 13/269153
[patent_app_country] => US
[patent_app_date] => 2011-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11554
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13269153
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/269153 | Electrode structure, semiconductor element, and methods of manufacturing the same | Oct 6, 2011 | Issued |
Array
(
[id] => 8533245
[patent_doc_number] => 08309399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-13
[patent_title] => 'Power semiconductor module and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 13/246615
[patent_app_country] => US
[patent_app_date] => 2011-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4922
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13246615
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/246615 | Power semiconductor module and method of manufacturing the same | Sep 26, 2011 | Issued |
Array
(
[id] => 7732596
[patent_doc_number] => 20120015485
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-19
[patent_title] => 'LOW NOISE HIGH THERMAL CONDUCTIVITY MIXED SIGNAL PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 13/243392
[patent_app_country] => US
[patent_app_date] => 2011-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5859
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0015/20120015485.pdf
[firstpage_image] =>[orig_patent_app_number] => 13243392
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/243392 | Low noise high thermal conductivity mixed signal package | Sep 22, 2011 | Issued |
Array
(
[id] => 8207577
[patent_doc_number] => 20120127720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'LIGHT EMITTING DEVICES AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 13/227961
[patent_app_country] => US
[patent_app_date] => 2011-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8157
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20120127720.pdf
[firstpage_image] =>[orig_patent_app_number] => 13227961
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/227961 | Light emitting devices and methods | Sep 7, 2011 | Issued |
Array
(
[id] => 8214996
[patent_doc_number] => 08193644
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-05
[patent_title] => 'Pop precursor with interposer for top package bond pad pitch compensation'
[patent_app_type] => utility
[patent_app_number] => 13/219878
[patent_app_country] => US
[patent_app_date] => 2011-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 4182
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/193/08193644.pdf
[firstpage_image] =>[orig_patent_app_number] => 13219878
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/219878 | Pop precursor with interposer for top package bond pad pitch compensation | Aug 28, 2011 | Issued |
Array
(
[id] => 8615304
[patent_doc_number] => 20130020616
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-24
[patent_title] => 'SILICIDED DEVICE WITH SHALLOW IMPURITY REGIONS AT INTERFACE BETWEEN SILICIDE AND STRESSED LINER'
[patent_app_type] => utility
[patent_app_number] => 13/186587
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2512
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186587
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186587 | Silicided device with shallow impurity regions at interface between silicide and stressed liner | Jul 19, 2011 | Issued |
Array
(
[id] => 8344843
[patent_doc_number] => 20120205770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-16
[patent_title] => 'SCHOTTKY DIODE WITH HIGH ANTISTATIC CAPABILITY'
[patent_app_type] => utility
[patent_app_number] => 13/186494
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1362
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186494
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186494 | Schottky diode with high antistatic capability | Jul 19, 2011 | Issued |
Array
(
[id] => 8217234
[patent_doc_number] => 20120132942
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'LIGHT EMITTING DIODE PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 13/186483
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1580
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186483
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186483 | Light emitting diode package | Jul 19, 2011 | Issued |
Array
(
[id] => 8982636
[patent_doc_number] => 08513756
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-08-20
[patent_title] => 'Semiconductor package and manufacturing method for a semiconductor package as well as optical module'
[patent_app_type] => utility
[patent_app_number] => 13/186625
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 33
[patent_no_of_words] => 6887
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186625
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186625 | Semiconductor package and manufacturing method for a semiconductor package as well as optical module | Jul 19, 2011 | Issued |
Array
(
[id] => 10893342
[patent_doc_number] => 08916957
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-23
[patent_title] => 'Package structure and package process'
[patent_app_type] => utility
[patent_app_number] => 13/186488
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2846
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186488
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186488 | Package structure and package process | Jul 19, 2011 | Issued |
Array
(
[id] => 9677436
[patent_doc_number] => 08816348
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-26
[patent_title] => 'Shielded gate MOSFET-Schottky rectifier-diode integrated circuits with trenched contact structures'
[patent_app_type] => utility
[patent_app_number] => 13/186615
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4338
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186615
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186615 | Shielded gate MOSFET-Schottky rectifier-diode integrated circuits with trenched contact structures | Jul 19, 2011 | Issued |
Array
(
[id] => 9113588
[patent_doc_number] => 08569765
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-29
[patent_title] => 'MOSFET-Schottky rectifier-diode integrated circuits with trench contact structures'
[patent_app_type] => utility
[patent_app_number] => 13/186619
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3535
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186619
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186619 | MOSFET-Schottky rectifier-diode integrated circuits with trench contact structures | Jul 19, 2011 | Issued |
Array
(
[id] => 7738728
[patent_doc_number] => 20120018728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-26
[patent_title] => 'THIN FILM TRANSISTOR, DISPLAY DEVICE USING THE SAME, AND THIN FILM TRANSISTOR MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/186564
[patent_app_country] => US
[patent_app_date] => 2011-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7469
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20120018728.pdf
[firstpage_image] =>[orig_patent_app_number] => 13186564
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186564 | Thin film transistor, display device using the same, and thin film transistor manufacturing method | Jul 19, 2011 | Issued |
Array
(
[id] => 8275077
[patent_doc_number] => 20120168950
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'DIE STRUCTURE, MANUFACTURING METHOD AND SUBSTRATE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/186411
[patent_app_country] => US
[patent_app_date] => 2011-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5006
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186411
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/186411 | Die structure, manufacturing method and substrate thereof | Jul 18, 2011 | Issued |