Search

Eric Coleman

Examiner (ID: 4195, Phone: (571)272-4163 , Office: P/2183 )

Most Active Art Unit
2183
Art Unit(s)
2783, 2183, 2302
Total Applications
2409
Issued Applications
2133
Pending Applications
63
Abandoned Applications
235

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14427005 [patent_doc_number] => 10318306 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-11 [patent_title] => Multidimensional vectors in a coprocessor [patent_app_type] => utility [patent_app_number] => 15/598637 [patent_app_country] => US [patent_app_date] => 2017-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15598637 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/598637
Multidimensional vectors in a coprocessor May 17, 2017 Issued
Array ( [id] => 11945002 [patent_doc_number] => 20170249153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'Energy Efficient Processor Core Architecture for Image Processor' [patent_app_type] => utility [patent_app_number] => 15/595632 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 11067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15595632 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/595632
Energy efficient processor core architecture for image processor May 14, 2017 Issued
Array ( [id] => 14952657 [patent_doc_number] => 10437593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Techniques for comprehensively synchronizing execution threads [patent_app_type] => utility [patent_app_number] => 15/499843 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15499843 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/499843
Techniques for comprehensively synchronizing execution threads Apr 26, 2017 Issued
Array ( [id] => 13525961 [patent_doc_number] => 20180314523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => INDIRECT TARGET TAGGED GEOMETRIC BRANCH PREDICTION USING A SET OF TARGET ADDRESS PATTERN DATA [patent_app_type] => utility [patent_app_number] => 15/498678 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15498678 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/498678
Indirect target tagged geometric branch prediction using a set of target address pattern data Apr 26, 2017 Issued
Array ( [id] => 14523337 [patent_doc_number] => 10338929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Method for handling exceptions in exception-driven system [patent_app_type] => utility [patent_app_number] => 15/498149 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15498149 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/498149
Method for handling exceptions in exception-driven system Apr 25, 2017 Issued
Array ( [id] => 13664943 [patent_doc_number] => 10162633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Shift instruction [patent_app_type] => utility [patent_app_number] => 15/494911 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 13302 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15494911 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/494911
Shift instruction Apr 23, 2017 Issued
Array ( [id] => 13513317 [patent_doc_number] => 20180308201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => COMPUTE OPTIMIZATION MECHANISM [patent_app_type] => utility [patent_app_number] => 15/494905 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15494905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/494905
Compute optimization mechanism Apr 23, 2017 Issued
Array ( [id] => 14061749 [patent_doc_number] => 10235167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Microprocessor with supplementary commands for binary search and associated search method [patent_app_type] => utility [patent_app_number] => 15/493600 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6554 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493600 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493600
Microprocessor with supplementary commands for binary search and associated search method Apr 20, 2017 Issued
Array ( [id] => 13467127 [patent_doc_number] => 20180285106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => HIERARCHICAL GENERAL REGISTER FILE (GRF) FOR EXECUTION BLOCK [patent_app_type] => utility [patent_app_number] => 15/477033 [patent_app_country] => US [patent_app_date] => 2017-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477033 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/477033
Hierarchical general register file (GRF) for execution block Mar 31, 2017 Issued
Array ( [id] => 16323007 [patent_doc_number] => 10782972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-22 [patent_title] => Vector predication instruction [patent_app_type] => utility [patent_app_number] => 16/079241 [patent_app_country] => US [patent_app_date] => 2017-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 14979 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16079241 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/079241
Vector predication instruction Mar 16, 2017 Issued
Array ( [id] => 13432527 [patent_doc_number] => 20180267806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => CALCULATING WAIT TIME FOR BATCH SCHEDULER JOBS [patent_app_type] => utility [patent_app_number] => 15/461202 [patent_app_country] => US [patent_app_date] => 2017-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15461202 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/461202
Calculating wait time for batch scheduler jobs Mar 15, 2017 Issued
Array ( [id] => 12532344 [patent_doc_number] => 10007636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Microcontroller programmable system on a chip [patent_app_type] => utility [patent_app_number] => 15/455393 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 36 [patent_no_of_words] => 17765 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455393 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455393
Microcontroller programmable system on a chip Mar 9, 2017 Issued
Array ( [id] => 12532344 [patent_doc_number] => 10007636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Microcontroller programmable system on a chip [patent_app_type] => utility [patent_app_number] => 15/455393 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 36 [patent_no_of_words] => 17765 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455393 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455393
Microcontroller programmable system on a chip Mar 9, 2017 Issued
Array ( [id] => 12532344 [patent_doc_number] => 10007636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Microcontroller programmable system on a chip [patent_app_type] => utility [patent_app_number] => 15/455393 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 36 [patent_no_of_words] => 17765 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455393 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455393
Microcontroller programmable system on a chip Mar 9, 2017 Issued
Array ( [id] => 12532344 [patent_doc_number] => 10007636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Microcontroller programmable system on a chip [patent_app_type] => utility [patent_app_number] => 15/455393 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 36 [patent_no_of_words] => 17765 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455393 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455393
Microcontroller programmable system on a chip Mar 9, 2017 Issued
Array ( [id] => 14123489 [patent_doc_number] => 10248604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Microcontroller programmable system on a chip [patent_app_type] => utility [patent_app_number] => 15/453492 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 36 [patent_no_of_words] => 17755 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15453492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/453492
Microcontroller programmable system on a chip Mar 7, 2017 Issued
Array ( [id] => 16551591 [patent_doc_number] => 10884750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Strideshift instruction for transposing bits inside vector register [patent_app_type] => utility [patent_app_number] => 16/474888 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 18489 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16474888 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/474888
Strideshift instruction for transposing bits inside vector register Feb 27, 2017 Issued
Array ( [id] => 13948717 [patent_doc_number] => 10210134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => General-purpose parallel computing architecture [patent_app_type] => utility [patent_app_number] => 15/439777 [patent_app_country] => US [patent_app_date] => 2017-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 14525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15439777 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/439777
General-purpose parallel computing architecture Feb 21, 2017 Issued
Array ( [id] => 11958139 [patent_doc_number] => 20170262290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'CAUSING AN INTERRUPT BASED ON EVENT COUNT' [patent_app_type] => utility [patent_app_number] => 15/438679 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438679 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438679
Causing an interrupt based on event count Feb 20, 2017 Issued
Array ( [id] => 14250093 [patent_doc_number] => 10275246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Programmable linear feedback shift register [patent_app_type] => utility [patent_app_number] => 15/433032 [patent_app_country] => US [patent_app_date] => 2017-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4628 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15433032 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/433032
Programmable linear feedback shift register Feb 14, 2017 Issued
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