Search

Eric Coleman

Examiner (ID: 10499, Phone: (571)272-4163 , Office: P/2183 )

Most Active Art Unit
2183
Art Unit(s)
2183, 2783, 2302
Total Applications
2406
Issued Applications
2133
Pending Applications
59
Abandoned Applications
235

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16894950 [patent_doc_number] => 11036503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Predicate indicator generation for vector processing operations [patent_app_type] => utility [patent_app_number] => 15/236769 [patent_app_country] => US [patent_app_date] => 2016-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6464 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15236769 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/236769
Predicate indicator generation for vector processing operations Aug 14, 2016 Issued
Array ( [id] => 16879804 [patent_doc_number] => 11029951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Smallest or largest value element determination [patent_app_type] => utility [patent_app_number] => 15/237085 [patent_app_country] => US [patent_app_date] => 2016-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 18345 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15237085 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/237085
Smallest or largest value element determination Aug 14, 2016 Issued
Array ( [id] => 11272539 [patent_doc_number] => 20160335086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'Read and Write Masks Update Instruction for Vectorization of Recursive Computations Over Independent Data' [patent_app_type] => utility [patent_app_number] => 15/219185 [patent_app_country] => US [patent_app_date] => 2016-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11299 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219185 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/219185
Read and write masks update instruction for vectorization of recursive computations over independent data Jul 24, 2016 Issued
Array ( [id] => 11131260 [patent_doc_number] => 20160328235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'INSTRUCTION FOR IMPLEMENTING ITERATIONS HAVING AN ITERATION DEPENDENT CONDITION WITH A VECTOR LOOP' [patent_app_type] => utility [patent_app_number] => 15/214348 [patent_app_country] => US [patent_app_date] => 2016-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 17473 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15214348 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/214348
Instruction for implementing iterations having an iteration dependent condition with a vector loop Jul 18, 2016 Issued
Array ( [id] => 12120928 [patent_doc_number] => 20180004514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Systems, Apparatuses, and Methods for Cumulative Summation' [patent_app_type] => utility [patent_app_number] => 15/201390 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 17539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201390 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201390
Systems, apparatuses, and methods for cumulative summation Jul 1, 2016 Issued
Array ( [id] => 12121043 [patent_doc_number] => 20180004628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'COOPERATIVE TRIGGERING' [patent_app_type] => utility [patent_app_number] => 15/201405 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 27567 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201405 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201405
Cooperative triggering Jul 1, 2016 Issued
Array ( [id] => 12120932 [patent_doc_number] => 20180004518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Systems, Apparatuses, and Methods for Strided Load' [patent_app_type] => utility [patent_app_number] => 15/201391 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 18273 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201391 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201391
Systems, apparatuses, and methods for strided load Jul 1, 2016 Issued
Array ( [id] => 12120924 [patent_doc_number] => 20180004510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMS' [patent_app_type] => utility [patent_app_number] => 15/201442 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 19797 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201442 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201442
Interruptible and restartable matrix multiplication instructions, processors, methods, and systems Jul 1, 2016 Issued
Array ( [id] => 12120939 [patent_doc_number] => 20180004524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'REGISTER RECLAMATION' [patent_app_type] => utility [patent_app_number] => 15/201403 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 29647 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201403 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201403
Register reclamation Jul 1, 2016 Issued
Array ( [id] => 13143553 [patent_doc_number] => 10089110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Systems, apparatuses, and methods for cumulative product [patent_app_type] => utility [patent_app_number] => 15/201392 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 16518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201392 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201392
Systems, apparatuses, and methods for cumulative product Jul 1, 2016 Issued
Array ( [id] => 12120938 [patent_doc_number] => 20180004525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'SYSTEMS, APPARATUSES, AND METHODS FOR SNOOPING PERSISTENT MEMORY STORE ADDRESSES' [patent_app_type] => utility [patent_app_number] => 15/201446 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16888 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201446 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201446
Systems, apparatuses, and methods for snooping persistent memory store addresses Jul 1, 2016 Issued
Array ( [id] => 15136979 [patent_doc_number] => 10481957 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Processor and task processing method therefor, and storage medium [patent_app_type] => utility [patent_app_number] => 15/763996 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7271 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15763996 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/763996
Processor and task processing method therefor, and storage medium Jun 30, 2016 Issued
Array ( [id] => 14149383 [patent_doc_number] => 10255072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Architectural register replacement for instructions that use multiple architectural registers [patent_app_type] => utility [patent_app_number] => 15/201310 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 15543 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201310 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201310
Architectural register replacement for instructions that use multiple architectural registers Jun 30, 2016 Issued
Array ( [id] => 12120936 [patent_doc_number] => 20180004522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'APPARATUSES, METHODS, AND SYSTEMS FOR MEMORY DISAMBIGUATION' [patent_app_type] => utility [patent_app_number] => 15/201218 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14699 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201218 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201218
Apparatuses, methods, and systems for memory disambiguation Jun 30, 2016 Issued
Array ( [id] => 12120927 [patent_doc_number] => 20180004513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'APPARATUSES, METHODS, AND SYSTEMS FOR ELEMENT SORTING OF VECTORS' [patent_app_type] => utility [patent_app_number] => 15/201138 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 22284 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201138 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201138
Apparatuses, methods, and systems for element sorting of vectors Jun 30, 2016 Issued
Array ( [id] => 13767281 [patent_doc_number] => 10175982 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-08 [patent_title] => Storing taken branch information [patent_app_type] => utility [patent_app_number] => 15/184308 [patent_app_country] => US [patent_app_date] => 2016-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5297 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15184308 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/184308
Storing taken branch information Jun 15, 2016 Issued
Array ( [id] => 14952659 [patent_doc_number] => 10437594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Apparatus and method for transferring a plurality of data structures between memory and one or more vectors of data elements stored in a register bank [patent_app_type] => utility [patent_app_number] => 15/746559 [patent_app_country] => US [patent_app_date] => 2016-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 14924 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15746559 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/746559
Apparatus and method for transferring a plurality of data structures between memory and one or more vectors of data elements stored in a register bank Jun 14, 2016 Issued
Array ( [id] => 12474858 [patent_doc_number] => 09990204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-05 [patent_title] => Data processing [patent_app_type] => utility [patent_app_number] => 15/182335 [patent_app_country] => US [patent_app_date] => 2016-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 5926 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15182335 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/182335
Data processing Jun 13, 2016 Issued
Array ( [id] => 13891441 [patent_doc_number] => 10198268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Data processing [patent_app_type] => utility [patent_app_number] => 15/182385 [patent_app_country] => US [patent_app_date] => 2016-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 6787 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15182385 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/182385
Data processing Jun 13, 2016 Issued
Array ( [id] => 13212641 [patent_doc_number] => 10120690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-06 [patent_title] => Reservation station early age indicator generation [patent_app_type] => utility [patent_app_number] => 15/181183 [patent_app_country] => US [patent_app_date] => 2016-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15181183 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/181183
Reservation station early age indicator generation Jun 12, 2016 Issued
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