
Eric Coleman
Examiner (ID: 7488, Phone: (571)272-4163 , Office: P/2183 )
| Most Active Art Unit | 2183 |
| Art Unit(s) | 2302, 2183, 2783 |
| Total Applications | 2413 |
| Issued Applications | 2133 |
| Pending Applications | 67 |
| Abandoned Applications | 235 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4557572
[patent_doc_number] => 07821029
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-26
[patent_title] => 'Electrostatic protection element'
[patent_app_type] => utility
[patent_app_number] => 12/542998
[patent_app_country] => US
[patent_app_date] => 2009-08-18
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[pdf_file] => patents/07/821/07821029.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/542998 | Electrostatic protection element | Aug 17, 2009 | Issued |
Array
(
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[patent_doc_number] => 20110031624
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[patent_kind] => A1
[patent_issue_date] => 2011-02-10
[patent_title] => 'MEMS and a Protection Structure Thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/538168 | MEMS and a protection structure thereof | Aug 9, 2009 | Issued |
Array
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[patent_title] => 'Stud bumps for die alignment'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/537957 | Stud bumps for die alignment | Aug 6, 2009 | Issued |
Array
(
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[patent_issue_date] => 2011-01-04
[patent_title] => 'Integrated circuit packaging system with a tiered substrate package and method of manufacture thereof'
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Array
(
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[patent_title] => 'SEMICONDUCTOR CHIP AND METHOD FOR FABRICATING THE SAME'
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Array
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[patent_title] => 'Large area thin freestanding nitride layers and their use as circuit layers'
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Array
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Array
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[id] => 7775620
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[patent_title] => 'Semiconductor package and method of manufacturing the same, and semiconductor device and method of manufacturing the same'
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Array
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[id] => 6247306
[patent_doc_number] => 20100025838
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[patent_issue_date] => 2010-02-04
[patent_title] => 'ELECTRONIC DEVICE PROTECTED AGAINST ELECTRO STATIC DISCHARGE'
[patent_app_type] => utility
[patent_app_number] => 12/512112
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/512112 | Electronic device protected against electro static discharge | Jul 29, 2009 | Issued |
Array
(
[id] => 6369050
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[patent_title] => 'ENHANCED INTEGRATED CIRCUIT PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 12/511077
[patent_app_country] => US
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Array
(
[id] => 4578095
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[patent_title] => 'Superjunction trench device formation methods'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/511849 | Superjunction trench device formation methods | Jul 28, 2009 | Issued |
Array
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[id] => 6145474
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[patent_title] => 'POP PRECURSOR WITH INTERPOSER FOR TOP PACKAGE BOND PAD PITCH COMPENSATION'
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Array
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[id] => 6145485
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Array
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Array
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Array
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Array
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Array
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