Search

Eric D. Bertram

Examiner (ID: 10283, Phone: (571)272-3446 , Office: P/3766 )

Most Active Art Unit
3766
Art Unit(s)
3792, 3766, 3796, 3762
Total Applications
1515
Issued Applications
1125
Pending Applications
125
Abandoned Applications
295

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11660040 [patent_doc_number] => 09673051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-06 [patent_title] => 'High density patterned material on integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/996014 [patent_app_country] => US [patent_app_date] => 2016-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 8792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14996014 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/996014
High density patterned material on integrated circuits Jan 13, 2016 Issued
Array ( [id] => 10765232 [patent_doc_number] => 20160111388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/983753 [patent_app_country] => US [patent_app_date] => 2015-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 20182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983753 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/983753
SEMICONDUCTOR DEVICE Dec 29, 2015 Abandoned
Array ( [id] => 11740211 [patent_doc_number] => 09704804 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-11 [patent_title] => 'Oxidation resistant barrier metal process for semiconductor devices' [patent_app_type] => utility [patent_app_number] => 14/974012 [patent_app_country] => US [patent_app_date] => 2015-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14974012 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/974012
Oxidation resistant barrier metal process for semiconductor devices Dec 17, 2015 Issued
Array ( [id] => 11453290 [patent_doc_number] => 09576942 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Integrated circuit assembly that includes stacked dice' [patent_app_type] => utility [patent_app_number] => 14/974811 [patent_app_country] => US [patent_app_date] => 2015-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4091 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14974811 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/974811
Integrated circuit assembly that includes stacked dice Dec 17, 2015 Issued
Array ( [id] => 10993112 [patent_doc_number] => 20160190058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 14/972185 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5163 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14972185 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/972185
Semiconductor device Dec 16, 2015 Issued
Array ( [id] => 13019173 [patent_doc_number] => 10032704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Reducing cracking by adjusting opening size in pop packages [patent_app_type] => utility [patent_app_number] => 14/972586 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 4877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14972586 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/972586
Reducing cracking by adjusting opening size in pop packages Dec 16, 2015 Issued
Array ( [id] => 11847574 [patent_doc_number] => 09735131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Multi-stack package-on-package structures' [patent_app_type] => utility [patent_app_number] => 14/972622 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4955 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14972622 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/972622
Multi-stack package-on-package structures Dec 16, 2015 Issued
Array ( [id] => 10826153 [patent_doc_number] => 20160172321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'METHOD AND STRUCTURE FOR WAFER-LEVEL PACKAGING' [patent_app_type] => utility [patent_app_number] => 14/971495 [patent_app_country] => US [patent_app_date] => 2015-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4919 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14971495 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/971495
Method and structure for wafer-level packaging Dec 15, 2015 Issued
Array ( [id] => 11898193 [patent_doc_number] => 09768135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Semiconductor device having conductive bump with improved reliability' [patent_app_type] => utility [patent_app_number] => 14/972049 [patent_app_country] => US [patent_app_date] => 2015-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 5804 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14972049 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/972049
Semiconductor device having conductive bump with improved reliability Dec 15, 2015 Issued
Array ( [id] => 10647010 [patent_doc_number] => 09363901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Making a plurality of integrated circuit packages' [patent_app_type] => utility [patent_app_number] => 14/965052 [patent_app_country] => US [patent_app_date] => 2015-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 4004 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965052 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/965052
Making a plurality of integrated circuit packages Dec 9, 2015 Issued
Array ( [id] => 10772193 [patent_doc_number] => 20160118349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-28 [patent_title] => 'SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/961825 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3253 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961825 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/961825
Semiconductor package Dec 6, 2015 Issued
Array ( [id] => 10638495 [patent_doc_number] => 09356006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Batch process fabrication of package-on-package microelectronic assemblies' [patent_app_type] => utility [patent_app_number] => 14/953565 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 7431 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953565 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953565
Batch process fabrication of package-on-package microelectronic assemblies Nov 29, 2015 Issued
Array ( [id] => 11564728 [patent_doc_number] => 09627323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 14/947274 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5493 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947274 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/947274
Semiconductor device and manufacturing method therefor Nov 19, 2015 Issued
Array ( [id] => 11564728 [patent_doc_number] => 09627323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 14/947274 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5493 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947274 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/947274
Semiconductor device and manufacturing method therefor Nov 19, 2015 Issued
Array ( [id] => 11564728 [patent_doc_number] => 09627323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 14/947274 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5493 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947274 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/947274
Semiconductor device and manufacturing method therefor Nov 19, 2015 Issued
Array ( [id] => 11564728 [patent_doc_number] => 09627323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 14/947274 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5493 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947274 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/947274
Semiconductor device and manufacturing method therefor Nov 19, 2015 Issued
Array ( [id] => 10709931 [patent_doc_number] => 20160056078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'Metal Pad Structure Over TSV to Reduce Shorting of Upper Metal Layer' [patent_app_type] => utility [patent_app_number] => 14/931516 [patent_app_country] => US [patent_app_date] => 2015-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5313 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14931516 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/931516
Metal pad structure over TSV to reduce shorting of upper metal layer Nov 2, 2015 Issued
Array ( [id] => 11087650 [patent_doc_number] => 20160284618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/926805 [patent_app_country] => US [patent_app_date] => 2015-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4402 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14926805 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/926805
Semiconductor device Oct 28, 2015 Issued
Array ( [id] => 11014365 [patent_doc_number] => 20160211318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'MICROELECTRONIC PACKAGE WITH SURFACE MOUNTED PASSIVE ELEMENT' [patent_app_type] => utility [patent_app_number] => 14/925995 [patent_app_country] => US [patent_app_date] => 2015-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2548 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925995 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925995
Microelectronic package with surface mounted passive element Oct 28, 2015 Issued
Array ( [id] => 11608072 [patent_doc_number] => 20170125375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'Semiconductor Device and Method of Forming DCALGA Package Using Semiconductor Die with Micro Pillars' [patent_app_type] => utility [patent_app_number] => 14/927361 [patent_app_country] => US [patent_app_date] => 2015-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6820 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14927361 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/927361
Semiconductor device and method of forming DCALGA package using semiconductor die with micro pillars Oct 28, 2015 Issued
Menu