
Eric D. Bertram
Examiner (ID: 10283, Phone: (571)272-3446 , Office: P/3766 )
| Most Active Art Unit | 3766 |
| Art Unit(s) | 3792, 3766, 3796, 3762 |
| Total Applications | 1515 |
| Issued Applications | 1125 |
| Pending Applications | 125 |
| Abandoned Applications | 295 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9065155
[patent_doc_number] => 20130256911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-03
[patent_title] => 'SEMICONDUCTOR CHIP STACK PACKAGE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/391063
[patent_app_country] => US
[patent_app_date] => 2010-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3132
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13391063
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/391063 | Semiconductor chip stack package and manufacturing method thereof | Feb 21, 2011 | Issued |
Array
(
[id] => 8533911
[patent_doc_number] => 08310067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-13
[patent_title] => 'Ball grid array package enhanced with a thermal and electrical connector'
[patent_app_type] => utility
[patent_app_number] => 13/030950
[patent_app_country] => US
[patent_app_date] => 2011-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 62
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/030950 | Ball grid array package enhanced with a thermal and electrical connector | Feb 17, 2011 | Issued |
Array
(
[id] => 9552907
[patent_doc_number] => 08759959
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-24
[patent_title] => 'Stacked semiconductor packages'
[patent_app_type] => utility
[patent_app_number] => 13/029736
[patent_app_country] => US
[patent_app_date] => 2011-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/029736 | Stacked semiconductor packages | Feb 16, 2011 | Issued |
Array
(
[id] => 8458595
[patent_doc_number] => 08294266
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-23
[patent_title] => 'Conductor bump method and apparatus'
[patent_app_type] => utility
[patent_app_number] => 13/027076
[patent_app_country] => US
[patent_app_date] => 2011-02-14
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13027076
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/027076 | Conductor bump method and apparatus | Feb 13, 2011 | Issued |
Array
(
[id] => 5940926
[patent_doc_number] => 20110101546
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-05
[patent_title] => 'System and Method for Directional Grinding on Backside of a Semiconductor Wafer'
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[pdf_file] => publications/A1/0101/20110101546.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/005666 | System and method for directional grinding on backside of a semiconductor wafer | Jan 12, 2011 | Issued |
Array
(
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[patent_doc_number] => 20110104852
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[patent_issue_date] => 2011-05-05
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF'
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[patent_app_number] => 13/005350
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[firstpage_image] =>[orig_patent_app_number] => 13005350
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/005350 | Semiconductor memory device and manufacturing method thereof | Jan 11, 2011 | Issued |
Array
(
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[patent_doc_number] => 20110095440
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[patent_kind] => A1
[patent_issue_date] => 2011-04-28
[patent_title] => 'SEMICONDUCTOR PACKAGE INCLUDING FLIP CHIP CONTROLLER AT BOTTOM OF DIE STACK'
[patent_app_type] => utility
[patent_app_number] => 12/986927
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0095/20110095440.pdf
[firstpage_image] =>[orig_patent_app_number] => 12986927
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/986927 | Semiconductor package including flip chip controller at bottom of die stack | Jan 6, 2011 | Issued |
Array
(
[id] => 8190280
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[patent_title] => 'Semiconductor device'
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[pdf_file] => patents/08/183/08183685.pdf
[firstpage_image] =>[orig_patent_app_number] => 12986716
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/986716 | Semiconductor device | Jan 6, 2011 | Issued |
Array
(
[id] => 7761989
[patent_doc_number] => 08114687
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[patent_kind] => B2
[patent_issue_date] => 2012-02-14
[patent_title] => 'Adapter board and method for manufacturing same, probe card, method for inspecting semiconductor wafer, and method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/929057
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/929057 | Adapter board and method for manufacturing same, probe card, method for inspecting semiconductor wafer, and method for manufacturing semiconductor device | Dec 26, 2010 | Issued |
Array
(
[id] => 7660089
[patent_doc_number] => 20110309358
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-22
[patent_title] => 'SEMICONDUCTOR CHIP WITH FINE PITCH LEADS FOR NORMAL TESTING OF SAME'
[patent_app_type] => utility
[patent_app_number] => 12/979317
[patent_app_country] => US
[patent_app_date] => 2010-12-27
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0309/20110309358.pdf
[firstpage_image] =>[orig_patent_app_number] => 12979317
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/979317 | SEMICONDUCTOR CHIP WITH FINE PITCH LEADS FOR NORMAL TESTING OF SAME | Dec 26, 2010 | Abandoned |
Array
(
[id] => 8398971
[patent_doc_number] => 08269356
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[patent_issue_date] => 2012-09-18
[patent_title] => 'Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates'
[patent_app_type] => utility
[patent_app_number] => 12/973410
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/973410 | Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates | Dec 19, 2010 | Issued |
Array
(
[id] => 7654789
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[patent_title] => 'Semiconductor Device and Method of Forming Flipchip Interconnection Structure with Bump on Partial Pad'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/969451 | Semiconductor device and method of forming flipchip interconnection structure with bump on partial pad | Dec 14, 2010 | Issued |
Array
(
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[patent_title] => 'Multi-chip semiconductor connector'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/956786 | Multi-chip semiconductor connector | Nov 29, 2010 | Issued |
Array
(
[id] => 6199793
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[patent_title] => 'GROUP III NITRIDE BASED FLIP-CHIP INTEGRATED CIRCUIT AND METHOD FOR FABRICATING'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/951372 | Group III nitride based flip-chip integrated circuit and method for fabricating | Nov 21, 2010 | Issued |
Array
(
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[patent_title] => 'METHOD FOR MANUFACTURING ELECTRONIC DEVICE, ELECTRONIC DEVICE, METHOD FOR MANUFACTURING ELECTRONIC DEVICE PACKAGE AND ELECTRONIC DEVICE PACKAGE'
[patent_app_type] => utility
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Array
(
[id] => 6052373
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[patent_title] => 'Semiconductor package with metal straps'
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Array
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[patent_title] => 'Semiconductor Device Having Solder-Free Gold Bump Contacts for Stability in Repeated Temperature Cycles'
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/912730 | Integrated circuit package system with image sensor system | Oct 25, 2010 | Issued |