
Eric D. Bertram
Examiner (ID: 10283)
| Most Active Art Unit | 3766 |
| Art Unit(s) | 3792, 3766, 3796, 3762 |
| Total Applications | 1976 |
| Issued Applications | 1684 |
| Pending Applications | 29 |
| Abandoned Applications | 273 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4849626
[patent_doc_number] => 20080315368
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-25
[patent_title] => 'Silicon Wafer Having Through-Wafer Vias'
[patent_app_type] => utility
[patent_app_number] => 12/202638
[patent_app_country] => US
[patent_app_date] => 2008-09-02
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/202638 | Silicon wafer having through-wafer vias | Sep 1, 2008 | Issued |
Array
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[patent_doc_number] => 08383498
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[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method for formation of tips'
[patent_app_type] => utility
[patent_app_number] => 12/675138
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Array
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[patent_issue_date] => 2008-12-25
[patent_title] => 'CHIP PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 12/201231
[patent_app_country] => US
[patent_app_date] => 2008-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/201231 | CHIP PACKAGE | Aug 28, 2008 | Abandoned |
Array
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[patent_issue_date] => 2008-12-11
[patent_title] => 'OPTICAL DEVICE AND METHOD FOR FABRICATING THE SAME'
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[patent_app_number] => 12/191639
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/191639 | Optical device and method for fabricating the same | Aug 13, 2008 | Issued |
Array
(
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[patent_title] => 'Land patterns for a semiconductor stacking structure and method therefor'
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Array
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[patent_title] => 'Reduced inductance in ball grid array packages'
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Array
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[patent_title] => 'DUAL-SIDED CHIP ATTACHED MODULES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/186655 | Dual-sided chip attached modules | Aug 5, 2008 | Issued |
Array
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[id] => 4789528
[patent_doc_number] => 20080290501
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[patent_title] => 'SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 12/184641
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[patent_app_date] => 2008-08-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/184641 | Semiconductor package | Jul 31, 2008 | Issued |
Array
(
[id] => 4776033
[patent_doc_number] => 20080284031
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[patent_issue_date] => 2008-11-20
[patent_title] => 'METHOD FOR IMPROVED PROCESS LATITUDE BY ELONGATED VIA INTEGRATION'
[patent_app_type] => utility
[patent_app_number] => 12/180882
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Array
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[id] => 112307
[patent_doc_number] => 07713790
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[patent_issue_date] => 2010-05-11
[patent_title] => 'Method and system of tape automated bonding'
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[patent_app_number] => 12/220711
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Array
(
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[patent_title] => 'ETCHED INTERPOSER FOR INTEGRATED CIRCUIT DEVICES'
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Array
(
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Array
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[id] => 5441470
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Array
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Array
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Array
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