Search

Eric D. Lee

Examiner (ID: 1963, Phone: (571)270-7098 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2851, 2825
Total Applications
773
Issued Applications
618
Pending Applications
46
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18235144 [patent_doc_number] => 11599703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Chip security verification tool [patent_app_type] => utility [patent_app_number] => 16/783237 [patent_app_country] => US [patent_app_date] => 2020-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 10259 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/783237
Chip security verification tool Feb 5, 2020 Issued
Array ( [id] => 19654925 [patent_doc_number] => 12176732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Wireless power charging method and electronic device using same [patent_app_type] => utility [patent_app_number] => 17/428908 [patent_app_country] => US [patent_app_date] => 2020-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13540 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17428908 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/428908
Wireless power charging method and electronic device using same Jan 22, 2020 Issued
Array ( [id] => 16729024 [patent_doc_number] => 20210096171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => METHOD AND DEVICE FOR PREDICTING OPERATION PARAMETER OF INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/742160 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742160
Method and device for predicting operation parameter of integrated circuit Jan 13, 2020 Issued
Array ( [id] => 16348791 [patent_doc_number] => 20200313442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => MULTI-POWER MANAGEMENT SYSTEM AND MULTI-POWER MANAGEMENT METHOD [patent_app_type] => utility [patent_app_number] => 16/736828 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736828 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/736828
MULTI-POWER MANAGEMENT SYSTEM AND MULTI-POWER MANAGEMENT METHOD Jan 7, 2020 Abandoned
Array ( [id] => 16161541 [patent_doc_number] => 20200219003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => METHOD FOR DEVELOPMENT OF A COMPILING PROCESS FOR A QUANTUM CIRCUIT ON A QUANTUM PROCESSOR AND SAID METHOD [patent_app_type] => utility [patent_app_number] => 16/727037 [patent_app_country] => US [patent_app_date] => 2019-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727037 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/727037
Method for development of a compiling process for a quantum circuit on a quantum processor and said method Dec 25, 2019 Issued
Array ( [id] => 16535567 [patent_doc_number] => 10878168 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Method for performing a layout versus schematic test for a multi-technology module [patent_app_type] => utility [patent_app_number] => 16/723385 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5132 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723385
Method for performing a layout versus schematic test for a multi-technology module Dec 19, 2019 Issued
Array ( [id] => 16788294 [patent_doc_number] => 10990728 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-27 [patent_title] => Functional built-in self-test architecture in an emulation system [patent_app_type] => utility [patent_app_number] => 16/721761 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721761
Functional built-in self-test architecture in an emulation system Dec 18, 2019 Issued
Array ( [id] => 17528922 [patent_doc_number] => 11301611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Deterministic clustering and packing method for random logic on programmable integrated circuits [patent_app_type] => utility [patent_app_number] => 16/720346 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 8901 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16720346 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/720346
Deterministic clustering and packing method for random logic on programmable integrated circuits Dec 18, 2019 Issued
Array ( [id] => 16096115 [patent_doc_number] => 20200202044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => PROCESS DEVELOPMENT VISUALIZATION TOOL [patent_app_type] => utility [patent_app_number] => 16/716274 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8211 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16716274 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/716274
Process development visualization tool Dec 15, 2019 Issued
Array ( [id] => 17151610 [patent_doc_number] => 11144688 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-12 [patent_title] => Virtual repeater insertion [patent_app_type] => utility [patent_app_number] => 16/714951 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 15003 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714951
Virtual repeater insertion Dec 15, 2019 Issued
Array ( [id] => 18131702 [patent_doc_number] => 11557920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Wireless power receiving device, wireless charging method and system [patent_app_type] => utility [patent_app_number] => 16/696131 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8002 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 470 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16696131 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/696131
Wireless power receiving device, wireless charging method and system Nov 25, 2019 Issued
Array ( [id] => 16711276 [patent_doc_number] => 20210078423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => VEHICLE CHARGER AND METHOD FOR CONTROLLING THE SAME [patent_app_type] => utility [patent_app_number] => 16/691371 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691371
Vehicle charger and method for controlling the same Nov 20, 2019 Issued
Array ( [id] => 18118595 [patent_doc_number] => 11549985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Power electronic circuit fault diagnosis method based on extremely randomized trees and stacked sparse auto-encoder algorithm [patent_app_type] => utility [patent_app_number] => 16/680532 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5051 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680532 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680532
Power electronic circuit fault diagnosis method based on extremely randomized trees and stacked sparse auto-encoder algorithm Nov 11, 2019 Issued
Array ( [id] => 16834262 [patent_doc_number] => 11010517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Methods and apparatuses for two-qubit gate reduction in quantum circuits [patent_app_type] => utility [patent_app_number] => 16/678835 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 15068 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678835
Methods and apparatuses for two-qubit gate reduction in quantum circuits Nov 7, 2019 Issued
Array ( [id] => 18019969 [patent_doc_number] => 20220371468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => THE METHOD OF PARKING AND CHARGING THE VEHICLE [patent_app_type] => utility [patent_app_number] => 17/765641 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17765641 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/765641
Method of parking and charging the vehicle Oct 20, 2019 Issued
Array ( [id] => 17942222 [patent_doc_number] => 11476686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Safety interlock [patent_app_type] => utility [patent_app_number] => 16/659086 [patent_app_country] => US [patent_app_date] => 2019-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16659086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/659086
Safety interlock Oct 20, 2019 Issued
Array ( [id] => 16864897 [patent_doc_number] => 11023641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Isolated wells for resistor devices [patent_app_type] => utility [patent_app_number] => 16/656122 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 8707 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656122 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656122
Isolated wells for resistor devices Oct 16, 2019 Issued
Array ( [id] => 17346074 [patent_doc_number] => 20220012405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => Adaptive Routing for Correcting Die Placement Errors [patent_app_type] => utility [patent_app_number] => 17/288369 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17288369 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/288369
Adaptive routing for correcting die placement errors Oct 1, 2019 Issued
Array ( [id] => 17263662 [patent_doc_number] => 20210376647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => A CHARGER DEVICE AND A METHOD OF CHARGING USING SAID CHARGER DEVICE [patent_app_type] => utility [patent_app_number] => 17/282092 [patent_app_country] => US [patent_app_date] => 2019-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17282092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/282092
Charger device and a method of charging using said charger device Sep 29, 2019 Issued
Array ( [id] => 15715353 [patent_doc_number] => 20200104443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => HARDWARE SIMULATION SYSTEMS AND METHODS FOR REDUCING SIGNAL DUMPING TIME AND SIZE BY FAST DYNAMICAL PARTIAL ALIASING OF SIGNALS HAVING SIMILAR WAVEFORM [patent_app_type] => utility [patent_app_number] => 16/586829 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586829 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586829
Hardware simulation systems and methods for reducing signal dumping time and size by fast dynamical partial aliasing of signals having similar waveform Sep 26, 2019 Issued
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