Search

Eric D. Lee

Examiner (ID: 19248, Phone: (571)270-7098 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2851, 2825
Total Applications
761
Issued Applications
615
Pending Applications
41
Abandoned Applications
124

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7676226 [patent_doc_number] => 20040153601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'General purpose lines for memory write protection' [patent_app_type] => new [patent_app_number] => 10/358454 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1701 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20040153601.pdf [firstpage_image] =>[orig_patent_app_number] => 10358454 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358454
General purpose lines for memory write protection Feb 3, 2003 Abandoned
Array ( [id] => 7386851 [patent_doc_number] => 20040037276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'System and method for packet storage and retrieval' [patent_app_type] => new [patent_app_number] => 10/358548 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8595 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20040037276.pdf [firstpage_image] =>[orig_patent_app_number] => 10358548 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358548
System and method for packet storage and retrieval Feb 3, 2003 Issued
Array ( [id] => 675923 [patent_doc_number] => 07093059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Read-write switching method for a memory controller' [patent_app_type] => utility [patent_app_number] => 10/335485 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3045 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/093/07093059.pdf [firstpage_image] =>[orig_patent_app_number] => 10335485 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/335485
Read-write switching method for a memory controller Dec 30, 2002 Issued
Array ( [id] => 7673673 [patent_doc_number] => 20040128445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Cache memory and methods thereof' [patent_app_type] => new [patent_app_number] => 10/335109 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1375 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20040128445.pdf [firstpage_image] =>[orig_patent_app_number] => 10335109 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/335109
Cache memory and methods thereof Dec 30, 2002 Abandoned
Array ( [id] => 7673648 [patent_doc_number] => 20040128470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Log-structured write cache for data storage devices and systems' [patent_app_type] => new [patent_app_number] => 10/330586 [patent_app_country] => US [patent_app_date] => 2002-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7450 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20040128470.pdf [firstpage_image] =>[orig_patent_app_number] => 10330586 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/330586
System and method for sequentially staging received data to a write cache in advance of storing the received data Dec 26, 2002 Issued
Array ( [id] => 7476835 [patent_doc_number] => 20040123034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Multiple cache coherency' [patent_app_type] => new [patent_app_number] => 10/327778 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3060 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20040123034.pdf [firstpage_image] =>[orig_patent_app_number] => 10327778 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327778
Multiple cache coherency Dec 22, 2002 Issued
Array ( [id] => 937511 [patent_doc_number] => 06976124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Control method of control device conducting data input and output to storage devices, and control device used therefor' [patent_app_type] => utility [patent_app_number] => 10/327751 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 8134 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/976/06976124.pdf [firstpage_image] =>[orig_patent_app_number] => 10327751 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327751
Control method of control device conducting data input and output to storage devices, and control device used therefor Dec 22, 2002 Issued
Array ( [id] => 736139 [patent_doc_number] => 07043619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-09 [patent_title] => 'Storage configurator for determining an optimal storage configuration for an application' [patent_app_type] => utility [patent_app_number] => 10/327561 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 52 [patent_no_of_words] => 10484 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/043/07043619.pdf [firstpage_image] =>[orig_patent_app_number] => 10327561 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327561
Storage configurator for determining an optimal storage configuration for an application Dec 19, 2002 Issued
Array ( [id] => 852065 [patent_doc_number] => 07383410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Language for expressing storage allocation requirements' [patent_app_type] => utility [patent_app_number] => 10/327558 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 21080 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/383/07383410.pdf [firstpage_image] =>[orig_patent_app_number] => 10327558 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327558
Language for expressing storage allocation requirements Dec 19, 2002 Issued
Array ( [id] => 6741642 [patent_doc_number] => 20030159011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'Data backup apparatus and data backup method' [patent_app_type] => new [patent_app_number] => 10/320513 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9421 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20030159011.pdf [firstpage_image] =>[orig_patent_app_number] => 10320513 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320513
Data backup using both tape and disk storage Dec 16, 2002 Issued
Array ( [id] => 6684991 [patent_doc_number] => 20030120855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Data-driven information processing device and method to access multiple bank memories according to multiple addresses' [patent_app_type] => new [patent_app_number] => 10/320555 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5608 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20030120855.pdf [firstpage_image] =>[orig_patent_app_number] => 10320555 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320555
Data-driven information processing device and method to access multiple bank memories according to multiple addresses Dec 16, 2002 Issued
Array ( [id] => 989458 [patent_doc_number] => 06922751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Reading or writing while searching in a CAM' [patent_app_type] => utility [patent_app_number] => 10/320490 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5662 [patent_no_of_claims] => 94 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/922/06922751.pdf [firstpage_image] =>[orig_patent_app_number] => 10320490 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320490
Reading or writing while searching in a CAM Dec 16, 2002 Issued
Array ( [id] => 789371 [patent_doc_number] => 06988164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-01-17 [patent_title] => 'Compare circuit and method for content addressable memory (CAM) device' [patent_app_type] => utility [patent_app_number] => 10/320588 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6568 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/988/06988164.pdf [firstpage_image] =>[orig_patent_app_number] => 10320588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320588
Compare circuit and method for content addressable memory (CAM) device Dec 15, 2002 Issued
Array ( [id] => 7474402 [patent_doc_number] => 20040103272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Using a processor cache as RAM during platform initialization' [patent_app_type] => new [patent_app_number] => 10/306327 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1646 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20040103272.pdf [firstpage_image] =>[orig_patent_app_number] => 10306327 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306327
Using a processor cache as RAM during platform initialization Nov 26, 2002 Abandoned
Array ( [id] => 623221 [patent_doc_number] => 07143234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-28 [patent_title] => 'Bios storage array' [patent_app_type] => utility [patent_app_number] => 10/305727 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6134 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/143/07143234.pdf [firstpage_image] =>[orig_patent_app_number] => 10305727 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305727
Bios storage array Nov 25, 2002 Issued
Array ( [id] => 1020914 [patent_doc_number] => 06892276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Increased data availability in raid arrays using smart drives' [patent_app_type] => utility [patent_app_number] => 10/304994 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3952 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/892/06892276.pdf [firstpage_image] =>[orig_patent_app_number] => 10304994 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/304994
Increased data availability in raid arrays using smart drives Nov 25, 2002 Issued
Array ( [id] => 7214330 [patent_doc_number] => 20040088481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Using non-volatile memories for disk caching' [patent_app_type] => new [patent_app_number] => 10/287115 [patent_app_country] => US [patent_app_date] => 2002-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2836 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20040088481.pdf [firstpage_image] =>[orig_patent_app_number] => 10287115 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/287115
Using non-volatile memories for disk caching Nov 3, 2002 Abandoned
Array ( [id] => 431367 [patent_doc_number] => 07269709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Memory controller configurable to allow bandwidth/latency tradeoff' [patent_app_type] => utility [patent_app_number] => 10/269913 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12687 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/269/07269709.pdf [firstpage_image] =>[orig_patent_app_number] => 10269913 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/269913
Memory controller configurable to allow bandwidth/latency tradeoff Oct 10, 2002 Issued
Array ( [id] => 540439 [patent_doc_number] => 07173452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'Re-programmable finite state machine' [patent_app_type] => utility [patent_app_number] => 10/245436 [patent_app_country] => US [patent_app_date] => 2002-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4214 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/173/07173452.pdf [firstpage_image] =>[orig_patent_app_number] => 10245436 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245436
Re-programmable finite state machine Sep 15, 2002 Issued
Array ( [id] => 890487 [patent_doc_number] => 07353356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'High speed, low current consumption FIFO circuit' [patent_app_type] => utility [patent_app_number] => 10/222915 [patent_app_country] => US [patent_app_date] => 2002-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6744 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/353/07353356.pdf [firstpage_image] =>[orig_patent_app_number] => 10222915 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/222915
High speed, low current consumption FIFO circuit Aug 18, 2002 Issued
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