Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7634860 [patent_doc_number] => 06656758 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Method of manufacturing a chip size package' [patent_app_type] => B1 [patent_app_number] => 09/684604 [patent_app_country] => US [patent_app_date] => 2000-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4563 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/656/06656758.pdf [firstpage_image] =>[orig_patent_app_number] => 09684604 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/684604
Method of manufacturing a chip size package Oct 5, 2000 Issued
Array ( [id] => 1372092 [patent_doc_number] => 06562717 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Semiconductor device having multiple thickness nickel silicide layers' [patent_app_type] => B1 [patent_app_number] => 09/679874 [patent_app_country] => US [patent_app_date] => 2000-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 6125 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562717.pdf [firstpage_image] =>[orig_patent_app_number] => 09679874 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/679874
Semiconductor device having multiple thickness nickel silicide layers Oct 4, 2000 Issued
Array ( [id] => 1341622 [patent_doc_number] => 06586333 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Integrated plasma treatment and nickel deposition and tool for performing same' [patent_app_type] => B1 [patent_app_number] => 09/680264 [patent_app_country] => US [patent_app_date] => 2000-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 6333 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/586/06586333.pdf [firstpage_image] =>[orig_patent_app_number] => 09680264 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/680264
Integrated plasma treatment and nickel deposition and tool for performing same Oct 4, 2000 Issued
Array ( [id] => 1180519 [patent_doc_number] => 06744140 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Semiconductor chip and method of producing the same' [patent_app_type] => B1 [patent_app_number] => 09/665663 [patent_app_country] => US [patent_app_date] => 2000-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2257 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744140.pdf [firstpage_image] =>[orig_patent_app_number] => 09665663 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/665663
Semiconductor chip and method of producing the same Sep 19, 2000 Issued
Array ( [id] => 1022588 [patent_doc_number] => 06888241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-03 [patent_title] => 'Electronic multipurpose seal with passive transponder' [patent_app_type] => utility [patent_app_number] => 10/070414 [patent_app_country] => US [patent_app_date] => 2000-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 5465 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888241.pdf [firstpage_image] =>[orig_patent_app_number] => 10070414 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/070414
Electronic multipurpose seal with passive transponder Sep 14, 2000 Issued
Array ( [id] => 1396312 [patent_doc_number] => 06531346 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Fabrication method of thin film transistor substrate for X-ray detector' [patent_app_type] => B1 [patent_app_number] => 09/653203 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3525 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531346.pdf [firstpage_image] =>[orig_patent_app_number] => 09653203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/653203
Fabrication method of thin film transistor substrate for X-ray detector Aug 30, 2000 Issued
Array ( [id] => 668449 [patent_doc_number] => 07094690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-22 [patent_title] => 'Deposition methods and apparatuses providing surface activation' [patent_app_type] => utility [patent_app_number] => 09/652533 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5498 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/094/07094690.pdf [firstpage_image] =>[orig_patent_app_number] => 09652533 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652533
Deposition methods and apparatuses providing surface activation Aug 30, 2000 Issued
09/623344 THINNED SURFACE MOUNT TYPE SEMICONDUCTOR PACKAGE WITH PLURALITY OF LEADS Aug 30, 2000 Abandoned
Array ( [id] => 1424070 [patent_doc_number] => 06503783 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'SOI CMOS device with reduced DIBL' [patent_app_type] => B1 [patent_app_number] => 09/652864 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3704 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/503/06503783.pdf [firstpage_image] =>[orig_patent_app_number] => 09652864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652864
SOI CMOS device with reduced DIBL Aug 30, 2000 Issued
Array ( [id] => 7631418 [patent_doc_number] => 06635514 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Compliant package with conductive elastomeric posts' [patent_app_type] => B1 [patent_app_number] => 09/644270 [patent_app_country] => US [patent_app_date] => 2000-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3947 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635514.pdf [firstpage_image] =>[orig_patent_app_number] => 09644270 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/644270
Compliant package with conductive elastomeric posts Aug 22, 2000 Issued
Array ( [id] => 1494808 [patent_doc_number] => 06403408 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Thin-film transistors and method for producing the same' [patent_app_type] => B1 [patent_app_number] => 09/644154 [patent_app_country] => US [patent_app_date] => 2000-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 32 [patent_no_of_words] => 5782 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403408.pdf [firstpage_image] =>[orig_patent_app_number] => 09644154 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/644154
Thin-film transistors and method for producing the same Aug 22, 2000 Issued
Array ( [id] => 658216 [patent_doc_number] => 07105458 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-12 [patent_title] => 'Method of etching semiconductor devices using a hydrogen peroxide-water mixture' [patent_app_type] => utility [patent_app_number] => 09/639163 [patent_app_country] => US [patent_app_date] => 2000-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 5211 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/105/07105458.pdf [firstpage_image] =>[orig_patent_app_number] => 09639163 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/639163
Method of etching semiconductor devices using a hydrogen peroxide-water mixture Aug 15, 2000 Issued
Array ( [id] => 1358749 [patent_doc_number] => 06573159 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Method for thermally annealing silicon wafer and silicon wafer' [patent_app_type] => B1 [patent_app_number] => 09/622203 [patent_app_country] => US [patent_app_date] => 2000-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8858 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573159.pdf [firstpage_image] =>[orig_patent_app_number] => 09622203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/622203
Method for thermally annealing silicon wafer and silicon wafer Aug 13, 2000 Issued
Array ( [id] => 1469923 [patent_doc_number] => 06407002 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Partial resist free approach in contact etch to improve W-filling' [patent_app_type] => B1 [patent_app_number] => 09/636583 [patent_app_country] => US [patent_app_date] => 2000-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 18 [patent_no_of_words] => 5245 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407002.pdf [firstpage_image] =>[orig_patent_app_number] => 09636583 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/636583
Partial resist free approach in contact etch to improve W-filling Aug 9, 2000 Issued
Array ( [id] => 1469808 [patent_doc_number] => 06406967 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Method for manufacturing cylindrical storage electrode of semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/632583 [patent_app_country] => US [patent_app_date] => 2000-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2329 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/406/06406967.pdf [firstpage_image] =>[orig_patent_app_number] => 09632583 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/632583
Method for manufacturing cylindrical storage electrode of semiconductor device Aug 6, 2000 Issued
Array ( [id] => 4309918 [patent_doc_number] => 06326662 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Split gate flash memory device with source line' [patent_app_type] => 1 [patent_app_number] => 9/633643 [patent_app_country] => US [patent_app_date] => 2000-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 31 [patent_no_of_words] => 6410 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326662.pdf [firstpage_image] =>[orig_patent_app_number] => 633643 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/633643
Split gate flash memory device with source line Aug 6, 2000 Issued
Array ( [id] => 1370879 [patent_doc_number] => 06562637 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer' [patent_app_type] => B1 [patent_app_number] => 09/631903 [patent_app_country] => US [patent_app_date] => 2000-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6448 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562637.pdf [firstpage_image] =>[orig_patent_app_number] => 09631903 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/631903
Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer Aug 3, 2000 Issued
Array ( [id] => 4408456 [patent_doc_number] => 06300211 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Highly reliable trench capacitor type memory cell' [patent_app_type] => 1 [patent_app_number] => 9/633344 [patent_app_country] => US [patent_app_date] => 2000-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 38 [patent_no_of_words] => 5673 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300211.pdf [firstpage_image] =>[orig_patent_app_number] => 633344 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/633344
Highly reliable trench capacitor type memory cell Aug 3, 2000 Issued
Array ( [id] => 1290960 [patent_doc_number] => 06630367 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-07 [patent_title] => 'Single crystal dual wafer, tunneling sensor and a method of making same' [patent_app_type] => B1 [patent_app_number] => 09/629684 [patent_app_country] => US [patent_app_date] => 2000-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 65 [patent_no_of_words] => 7630 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/630/06630367.pdf [firstpage_image] =>[orig_patent_app_number] => 09629684 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/629684
Single crystal dual wafer, tunneling sensor and a method of making same Jul 31, 2000 Issued
Array ( [id] => 1249118 [patent_doc_number] => 06674141 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Single crystal, tunneling and capacitive, three-axes sensor using eutectic bonding and a method of making same' [patent_app_type] => B1 [patent_app_number] => 09/629683 [patent_app_country] => US [patent_app_date] => 2000-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 66 [patent_no_of_words] => 7321 [patent_no_of_claims] => 88 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674141.pdf [firstpage_image] =>[orig_patent_app_number] => 09629683 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/629683
Single crystal, tunneling and capacitive, three-axes sensor using eutectic bonding and a method of making same Jul 31, 2000 Issued
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