
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 397575
[patent_doc_number] => 07294544
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-11-13
[patent_title] => 'Method of making a metal-insulator-metal capacitor in the CMOS process'
[patent_app_type] => utility
[patent_app_number] => 09/249254
[patent_app_country] => US
[patent_app_date] => 1999-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2084
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/294/07294544.pdf
[firstpage_image] =>[orig_patent_app_number] => 09249254
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/249254 | Method of making a metal-insulator-metal capacitor in the CMOS process | Feb 11, 1999 | Issued |
Array
(
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[patent_doc_number] => 06258660
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-10
[patent_title] => 'Method of making a self-aligned recessed container cell capacitor'
[patent_app_type] => 1
[patent_app_number] => 9/249388
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[patent_app_date] => 1999-02-12
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[pdf_file] => patents/06/258/06258660.pdf
[firstpage_image] =>[orig_patent_app_number] => 249388
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Array
(
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[patent_doc_number] => 06190987
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-20
[patent_title] => 'MOS semiconductor device and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/246799
[patent_app_country] => US
[patent_app_date] => 1999-02-09
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[pdf_file] => patents/06/190/06190987.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/246799 | MOS semiconductor device and method of manufacturing the same | Feb 8, 1999 | Issued |
Array
(
[id] => 4361053
[patent_doc_number] => 06218734
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-17
[patent_title] => 'Copper adhered to a diffusion barrier surface'
[patent_app_type] => 1
[patent_app_number] => 9/247650
[patent_app_country] => US
[patent_app_date] => 1999-02-09
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[pdf_file] => patents/06/218/06218734.pdf
[firstpage_image] =>[orig_patent_app_number] => 247650
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/247650 | Copper adhered to a diffusion barrier surface | Feb 8, 1999 | Issued |
Array
(
[id] => 4408749
[patent_doc_number] => 06300237
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-09
[patent_title] => 'Semiconductor integrated circuit device and method for making the same'
[patent_app_type] => 1
[patent_app_number] => 9/245743
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[patent_app_date] => 1999-02-08
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[patent_drawing_sheets_cnt] => 13
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[pdf_file] => patents/06/300/06300237.pdf
[firstpage_image] =>[orig_patent_app_number] => 245743
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/245743 | Semiconductor integrated circuit device and method for making the same | Feb 7, 1999 | Issued |
Array
(
[id] => 4419163
[patent_doc_number] => 06177285
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-23
[patent_title] => 'Process for determining the crystal orientation in a wafer'
[patent_app_type] => 1
[patent_app_number] => 9/142124
[patent_app_country] => US
[patent_app_date] => 1999-02-05
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[pdf_file] => patents/06/177/06177285.pdf
[firstpage_image] =>[orig_patent_app_number] => 142124
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/142124 | Process for determining the crystal orientation in a wafer | Feb 4, 1999 | Issued |
Array
(
[id] => 4233568
[patent_doc_number] => 06074899
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-13
[patent_title] => '3-D CMOS-on-SOI ESD structure and method'
[patent_app_type] => 1
[patent_app_number] => 9/245488
[patent_app_country] => US
[patent_app_date] => 1999-02-05
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[pdf_file] => patents/06/074/06074899.pdf
[firstpage_image] =>[orig_patent_app_number] => 245488
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/245488 | 3-D CMOS-on-SOI ESD structure and method | Feb 4, 1999 | Issued |
Array
(
[id] => 4359062
[patent_doc_number] => 06291871
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-18
[patent_title] => 'Method of jointly forming stacked capacitors and antifuses, method of blowing antifuses, and antifuses and stacked capacitors constituting a part of integrated circuitry'
[patent_app_type] => 1
[patent_app_number] => 9/244557
[patent_app_country] => US
[patent_app_date] => 1999-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/06/291/06291871.pdf
[firstpage_image] =>[orig_patent_app_number] => 244557
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/244557 | Method of jointly forming stacked capacitors and antifuses, method of blowing antifuses, and antifuses and stacked capacitors constituting a part of integrated circuitry | Feb 2, 1999 | Issued |
Array
(
[id] => 4274660
[patent_doc_number] => 06267479
[patent_country] => US
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[patent_issue_date] => 2001-07-31
[patent_title] => 'Semiconductor device, and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/241138
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[patent_app_date] => 1999-02-02
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[pdf_file] => patents/06/267/06267479.pdf
[firstpage_image] =>[orig_patent_app_number] => 241138
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/241138 | Semiconductor device, and method for manufacturing the same | Feb 1, 1999 | Issued |
Array
(
[id] => 6290344
[patent_doc_number] => 20020055207
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-09
[patent_title] => 'METHOD FOR FABRICATING THIN-FILM TRANSISTOR'
[patent_app_type] => new
[patent_app_number] => 09/238899
[patent_app_country] => US
[patent_app_date] => 1999-01-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0055/20020055207.pdf
[firstpage_image] =>[orig_patent_app_number] => 09238899
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/238899 | Method for fabricating thin-film transistor | Jan 27, 1999 | Issued |
Array
(
[id] => 4347511
[patent_doc_number] => 06214654
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-10
[patent_title] => 'Method for forming super-steep retrograded channel (SSRC) for CMOS transistor using rapid laser annealing to reduce thermal budget'
[patent_app_type] => 1
[patent_app_number] => 9/238358
[patent_app_country] => US
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[pdf_file] => patents/06/214/06214654.pdf
[firstpage_image] =>[orig_patent_app_number] => 238358
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/238358 | Method for forming super-steep retrograded channel (SSRC) for CMOS transistor using rapid laser annealing to reduce thermal budget | Jan 26, 1999 | Issued |
Array
(
[id] => 4158887
[patent_doc_number] => 06124614
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[patent_kind] => NA
[patent_issue_date] => 2000-09-26
[patent_title] => 'Si/SiGe MOSFET and method for fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 9/233329
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[firstpage_image] =>[orig_patent_app_number] => 233329
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/233329 | Si/SiGe MOSFET and method for fabricating the same | Jan 19, 1999 | Issued |
Array
(
[id] => 4331275
[patent_doc_number] => 06329669
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-11
[patent_title] => 'Semiconductor device able to test changeover circuit which switches connection between terminals'
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[patent_app_number] => 9/233209
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/233209 | Semiconductor device able to test changeover circuit which switches connection between terminals | Jan 19, 1999 | Issued |
Array
(
[id] => 4270816
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[patent_title] => 'Method for forming a semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 233146
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/233146 | Method for forming a semiconductor device | Jan 18, 1999 | Issued |
Array
(
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[patent_title] => 'SOI active pixel cell design with grounded body contact'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/231068 | SOI active pixel cell design with grounded body contact | Jan 13, 1999 | Issued |
Array
(
[id] => 4258964
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[patent_issue_date] => 2001-07-10
[patent_title] => 'High voltage field effect transistor and method of fabricating the same'
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[firstpage_image] =>[orig_patent_app_number] => 231369
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/231369 | High voltage field effect transistor and method of fabricating the same | Jan 12, 1999 | Issued |
Array
(
[id] => 4317668
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[patent_issue_date] => 2001-11-13
[patent_title] => 'Lateral high voltage semiconductor device with protective silicon nitride film in voltage withstanding region'
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Array
(
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 219528
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Array
(
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[pdf_file] => patents/06/232/06232618.pdf
[firstpage_image] =>[orig_patent_app_number] => 218659
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/218659 | Sensor with temperature-dependent measuring resistor and its use for temperature measurement | Dec 21, 1998 | Issued |