
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4286626
[patent_doc_number] => 06268248
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-31
[patent_title] => 'Method of fabricating a source line in flash memory having STI structures'
[patent_app_type] => 1
[patent_app_number] => 9/215478
[patent_app_country] => US
[patent_app_date] => 1998-12-18
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[pdf_file] => patents/06/268/06268248.pdf
[firstpage_image] =>[orig_patent_app_number] => 215478
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/215478 | Method of fabricating a source line in flash memory having STI structures | Dec 17, 1998 | Issued |
Array
(
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[patent_doc_number] => 06316817
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-13
[patent_title] => 'MeV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 9/272732
[patent_app_country] => US
[patent_app_date] => 1998-12-14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/272732 | MeV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistor | Dec 13, 1998 | Issued |
Array
(
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[patent_issue_date] => 2001-05-15
[patent_title] => 'Method for forming electrostatic discharge (ESD) protection transistors'
[patent_app_type] => 1
[patent_app_number] => 9/208409
[patent_app_country] => US
[patent_app_date] => 1998-12-10
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[pdf_file] => patents/06/232/06232206.pdf
[firstpage_image] =>[orig_patent_app_number] => 208409
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/208409 | Method for forming electrostatic discharge (ESD) protection transistors | Dec 9, 1998 | Issued |
Array
(
[id] => 4291666
[patent_doc_number] => 06180438
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Thin film transistors and electronic devices comprising such'
[patent_app_type] => 1
[patent_app_number] => 9/209079
[patent_app_country] => US
[patent_app_date] => 1998-12-10
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[firstpage_image] =>[orig_patent_app_number] => 209079
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/209079 | Thin film transistors and electronic devices comprising such | Dec 9, 1998 | Issued |
Array
(
[id] => 4408560
[patent_doc_number] => 06228703
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[patent_issue_date] => 2001-05-08
[patent_title] => 'Method of fabricating mixed-mode semiconductor device having a capacitor and a gate'
[patent_app_type] => 1
[patent_app_number] => 9/209648
[patent_app_country] => US
[patent_app_date] => 1998-12-10
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[firstpage_image] =>[orig_patent_app_number] => 209648
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/209648 | Method of fabricating mixed-mode semiconductor device having a capacitor and a gate | Dec 9, 1998 | Issued |
Array
(
[id] => 4422559
[patent_doc_number] => 06194762
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[patent_issue_date] => 2001-02-27
[patent_title] => 'Complementary metal oxide semiconductor (CMOS) device comprising thin-film transistors arranged on a glass substrate'
[patent_app_type] => 1
[patent_app_number] => 9/206637
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[firstpage_image] =>[orig_patent_app_number] => 206637
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/206637 | Complementary metal oxide semiconductor (CMOS) device comprising thin-film transistors arranged on a glass substrate | Dec 6, 1998 | Issued |
Array
(
[id] => 7636626
[patent_doc_number] => 06380029
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[patent_issue_date] => 2002-04-30
[patent_title] => 'Method of forming ono stacked films and DCS tungsten silicide gate to improve polycide gate performance for flash memory devices'
[patent_app_type] => B1
[patent_app_number] => 09/205899
[patent_app_country] => US
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[pdf_file] => patents/06/380/06380029.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/205899 | Method of forming ono stacked films and DCS tungsten silicide gate to improve polycide gate performance for flash memory devices | Dec 3, 1998 | Issued |
Array
(
[id] => 4185609
[patent_doc_number] => 06093605
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-25
[patent_title] => 'Method of manufacturing a nonvolatile memory device having a program-assist plate'
[patent_app_type] => 1
[patent_app_number] => 9/199312
[patent_app_country] => US
[patent_app_date] => 1998-11-25
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[firstpage_image] =>[orig_patent_app_number] => 199312
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/199312 | Method of manufacturing a nonvolatile memory device having a program-assist plate | Nov 24, 1998 | Issued |
Array
(
[id] => 782727
[patent_doc_number] => 06991975
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[patent_issue_date] => 2006-01-31
[patent_title] => 'Laser process'
[patent_app_type] => utility
[patent_app_number] => 09/197534
[patent_app_country] => US
[patent_app_date] => 1998-11-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/197534 | Laser process | Nov 22, 1998 | Issued |
Array
(
[id] => 4369768
[patent_doc_number] => 06287991
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[patent_issue_date] => 2001-09-11
[patent_title] => 'Method for producing semiconductor device including step for removing contaminant'
[patent_app_type] => 1
[patent_app_number] => 9/197490
[patent_app_country] => US
[patent_app_date] => 1998-11-23
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[firstpage_image] =>[orig_patent_app_number] => 197490
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/197490 | Method for producing semiconductor device including step for removing contaminant | Nov 22, 1998 | Issued |
Array
(
[id] => 4343612
[patent_doc_number] => 06284576
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[patent_title] => 'Manufacturing method of a thin-film transistor of a reverse staggered type'
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[patent_app_number] => 9/196229
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/196229 | Manufacturing method of a thin-film transistor of a reverse staggered type | Nov 19, 1998 | Issued |
Array
(
[id] => 4153532
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[patent_issue_date] => 2000-08-22
[patent_title] => 'Semiconductor device and a method for the production of the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/196405 | Semiconductor device and a method for the production of the same | Nov 18, 1998 | Issued |
Array
(
[id] => 4388216
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[patent_issue_date] => 2001-08-21
[patent_title] => 'Image sensor shielding'
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Array
(
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[patent_title] => 'Method of manufacturing a dual doped CMOS gate'
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Array
(
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Array
(
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Array
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[patent_title] => 'Ferroelectric field effect transistor, memory utilizing same, and method of operating same'
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Array
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Array
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Array
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