
Eric E. Silverman
Examiner (ID: 15411)
| Most Active Art Unit | 1618 |
| Art Unit(s) | 1618, 1615 |
| Total Applications | 298 |
| Issued Applications | 111 |
| Pending Applications | 2 |
| Abandoned Applications | 185 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4204716
[patent_doc_number] => 06077743
[patent_country] => US
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[patent_issue_date] => 2000-06-20
[patent_title] => 'Method for making dynamic random access memory cells having brush-shaped stacked capacitors patterned from a hemispherical grain hard mask'
[patent_app_type] => 1
[patent_app_number] => 9/066018
[patent_app_country] => US
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Array
(
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[patent_issue_date] => 2000-06-20
[patent_title] => 'Method for making dynamic random access memory (DRAM) cells having zigzag-shaped stacked capacitors with increased capacitance'
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Array
(
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[patent_doc_number] => 06090681
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[patent_issue_date] => 2000-07-18
[patent_title] => 'Method of forming an HSG capacitor layer via implantation'
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[patent_app_number] => 9/064067
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[patent_app_date] => 1998-04-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/064067 | Method of forming an HSG capacitor layer via implantation | Apr 21, 1998 | Issued |
Array
(
[id] => 4101286
[patent_doc_number] => 06100117
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[patent_kind] => NA
[patent_issue_date] => 2000-08-08
[patent_title] => 'Method for manufacturing DRAM having a redundancy circuit region'
[patent_app_type] => 1
[patent_app_number] => 9/062639
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[patent_app_date] => 1998-04-20
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Array
(
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[patent_issue_date] => 2000-06-27
[patent_title] => 'Method for manufacturing capacitor\'s lower electrode'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/061658 | Method for manufacturing capacitor's lower electrode | Apr 16, 1998 | Issued |
Array
(
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[patent_doc_number] => 06211548
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[patent_issue_date] => 2001-04-03
[patent_title] => 'Metal-gate non-volatile memory cell'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/062239 | Metal-gate non-volatile memory cell | Apr 16, 1998 | Issued |
Array
(
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[patent_doc_number] => 06110786
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[patent_title] => 'Semiconductor device having elevated gate electrode and elevated active regions and method of manufacture thereof'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/061409 | Semiconductor device having elevated gate electrode and elevated active regions and method of manufacture thereof | Apr 15, 1998 | Issued |
Array
(
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[patent_title] => 'Method for manufacturing split-gate flash memory cell'
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Array
(
[id] => 4101709
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[patent_title] => 'Method for manufacturing a high performance transistor with self-aligned dopant profile'
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Array
(
[id] => 4145648
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[patent_title] => 'Gate fabrication processes for split-gate transistors'
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Array
(
[id] => 4139333
[patent_doc_number] => 06060366
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[patent_title] => 'Method for manufacturing dram capacitor incorporating liquid phase deposition'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/058579 | Method for manufacturing dram capacitor incorporating liquid phase deposition | Apr 9, 1998 | Issued |
Array
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Array
(
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Array
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Array
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Array
(
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Array
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Array
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