Search

Eric E. Silverman

Examiner (ID: 15411)

Most Active Art Unit
1618
Art Unit(s)
1618, 1615
Total Applications
298
Issued Applications
111
Pending Applications
2
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4275009 [patent_doc_number] => 06307235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Another technique for gated lateral bipolar transistors' [patent_app_type] => 1 [patent_app_number] => 9/050728 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 5142 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/307/06307235.pdf [firstpage_image] =>[orig_patent_app_number] => 050728 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/050728
Another technique for gated lateral bipolar transistors Mar 29, 1998 Issued
Array ( [id] => 4139732 [patent_doc_number] => 06121659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Buried patterned conductor planes for semiconductor-on-insulator integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/049488 [patent_app_country] => US [patent_app_date] => 1998-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3940 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121659.pdf [firstpage_image] =>[orig_patent_app_number] => 049488 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/049488
Buried patterned conductor planes for semiconductor-on-insulator integrated circuit Mar 26, 1998 Issued
Array ( [id] => 4419603 [patent_doc_number] => 06177330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method for correcting alignment, method for manufacturing a semiconductor device and a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/048163 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 31 [patent_no_of_words] => 8449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177330.pdf [firstpage_image] =>[orig_patent_app_number] => 048163 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/048163
Method for correcting alignment, method for manufacturing a semiconductor device and a semiconductor device Mar 25, 1998 Issued
Array ( [id] => 4181890 [patent_doc_number] => 06150198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Method of fabricating semiconductor read-only memory device with reduced parastic capacitance between bit line and word line' [patent_app_type] => 1 [patent_app_number] => 9/047228 [patent_app_country] => US [patent_app_date] => 1998-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3284 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150198.pdf [firstpage_image] =>[orig_patent_app_number] => 047228 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047228
Method of fabricating semiconductor read-only memory device with reduced parastic capacitance between bit line and word line Mar 24, 1998 Issued
Array ( [id] => 4359046 [patent_doc_number] => 06169011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Trench isolation structure and method for same' [patent_app_type] => 1 [patent_app_number] => 9/047038 [patent_app_country] => US [patent_app_date] => 1998-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2593 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169011.pdf [firstpage_image] =>[orig_patent_app_number] => 047038 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047038
Trench isolation structure and method for same Mar 23, 1998 Issued
Array ( [id] => 4424617 [patent_doc_number] => 06225650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'GAN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof' [patent_app_type] => 1 [patent_app_number] => 9/046638 [patent_app_country] => US [patent_app_date] => 1998-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 10313 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225650.pdf [firstpage_image] =>[orig_patent_app_number] => 046638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/046638
GAN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof Mar 23, 1998 Issued
Array ( [id] => 4247189 [patent_doc_number] => 06221738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Substrate and production method thereof' [patent_app_type] => 1 [patent_app_number] => 9/046433 [patent_app_country] => US [patent_app_date] => 1998-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 24 [patent_no_of_words] => 15202 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221738.pdf [firstpage_image] =>[orig_patent_app_number] => 046433 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/046433
Substrate and production method thereof Mar 23, 1998 Issued
Array ( [id] => 4089552 [patent_doc_number] => 06163055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 9/046198 [patent_app_country] => US [patent_app_date] => 1998-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 45 [patent_no_of_words] => 12511 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163055.pdf [firstpage_image] =>[orig_patent_app_number] => 046198 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/046198
Semiconductor device and manufacturing method thereof Mar 22, 1998 Issued
Array ( [id] => 4161502 [patent_doc_number] => 06107681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Pin-assignment method for integrated circuit packages to increase the electro-static discharge protective capability thereof' [patent_app_type] => 1 [patent_app_number] => 9/045327 [patent_app_country] => US [patent_app_date] => 1998-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3505 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107681.pdf [firstpage_image] =>[orig_patent_app_number] => 045327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/045327
Pin-assignment method for integrated circuit packages to increase the electro-static discharge protective capability thereof Mar 19, 1998 Issued
Array ( [id] => 4385185 [patent_doc_number] => 06303942 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Multi-layer charge injection barrier and uses thereof' [patent_app_type] => 1 [patent_app_number] => 9/042974 [patent_app_country] => US [patent_app_date] => 1998-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4712 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303942.pdf [firstpage_image] =>[orig_patent_app_number] => 042974 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/042974
Multi-layer charge injection barrier and uses thereof Mar 16, 1998 Issued
Array ( [id] => 4258582 [patent_doc_number] => 06258647 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/041597 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2927 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/258/06258647.pdf [firstpage_image] =>[orig_patent_app_number] => 041597 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041597
Method of fabricating semiconductor device Mar 12, 1998 Issued
Array ( [id] => 4098015 [patent_doc_number] => 06048780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Semiconductor device and manufacturing method for the same' [patent_app_type] => 1 [patent_app_number] => 9/037987 [patent_app_country] => US [patent_app_date] => 1998-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 4617 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048780.pdf [firstpage_image] =>[orig_patent_app_number] => 037987 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037987
Semiconductor device and manufacturing method for the same Mar 10, 1998 Issued
Array ( [id] => 3943186 [patent_doc_number] => 05976908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Method of fabricating solid-state image sensor' [patent_app_type] => 1 [patent_app_number] => 9/037698 [patent_app_country] => US [patent_app_date] => 1998-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2578 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/976/05976908.pdf [firstpage_image] =>[orig_patent_app_number] => 037698 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037698
Method of fabricating solid-state image sensor Mar 9, 1998 Issued
Array ( [id] => 4404305 [patent_doc_number] => 06271055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Process for manufacturing semiconductor element using non-monocrystalline semiconductor layers of first and second conductivity types and amorphous and microcrystalline I-type semiconductor layers' [patent_app_type] => 1 [patent_app_number] => 9/038708 [patent_app_country] => US [patent_app_date] => 1998-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 9491 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271055.pdf [firstpage_image] =>[orig_patent_app_number] => 038708 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/038708
Process for manufacturing semiconductor element using non-monocrystalline semiconductor layers of first and second conductivity types and amorphous and microcrystalline I-type semiconductor layers Mar 8, 1998 Issued
Array ( [id] => 7640315 [patent_doc_number] => 06395599 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Method for fabricating semiconductor storage device' [patent_app_type] => B1 [patent_app_number] => 09/037068 [patent_app_country] => US [patent_app_date] => 1998-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 109 [patent_no_of_words] => 34863 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/395/06395599.pdf [firstpage_image] =>[orig_patent_app_number] => 09037068 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037068
Method for fabricating semiconductor storage device Mar 8, 1998 Issued
Array ( [id] => 4130704 [patent_doc_number] => 06146927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Semiconductor device, manufacturing method therefor and liquid crystal driving apparatus comprising the semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/033469 [patent_app_country] => US [patent_app_date] => 1998-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 33 [patent_no_of_words] => 10677 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/146/06146927.pdf [firstpage_image] =>[orig_patent_app_number] => 033469 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/033469
Semiconductor device, manufacturing method therefor and liquid crystal driving apparatus comprising the semiconductor device Mar 1, 1998 Issued
Array ( [id] => 4172460 [patent_doc_number] => 06083793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Method to manufacture nonvolatile memories with a trench-pillar cell structure for high capacitive coupling ratio' [patent_app_type] => 1 [patent_app_number] => 9/032008 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2482 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083793.pdf [firstpage_image] =>[orig_patent_app_number] => 032008 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/032008
Method to manufacture nonvolatile memories with a trench-pillar cell structure for high capacitive coupling ratio Feb 26, 1998 Issued
Array ( [id] => 4108227 [patent_doc_number] => 06051849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer' [patent_app_type] => 1 [patent_app_number] => 9/032190 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4097 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/051/06051849.pdf [firstpage_image] =>[orig_patent_app_number] => 032190 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/032190
Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer Feb 26, 1998 Issued
Array ( [id] => 4140615 [patent_doc_number] => 06015995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'ROM diode structure' [patent_app_type] => 1 [patent_app_number] => 9/031818 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2456 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015995.pdf [firstpage_image] =>[orig_patent_app_number] => 031818 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/031818
ROM diode structure Feb 26, 1998 Issued
Array ( [id] => 4282326 [patent_doc_number] => 06281540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Semiconductor memory device having bitlines of common height' [patent_app_type] => 1 [patent_app_number] => 9/030248 [patent_app_country] => US [patent_app_date] => 1998-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5635 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281540.pdf [firstpage_image] =>[orig_patent_app_number] => 030248 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/030248
Semiconductor memory device having bitlines of common height Feb 24, 1998 Issued
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